On Wed, 1 Jul 2026 at 08:34, Cédric Le Goater <[email protected]> wrote:
>
> On 6/30/26 22:03, Peter Maydell wrote:
> > On Tue, 30 Jun 2026 at 18:33, Cédric Le Goater <[email protected]> wrote:
> >>
> >> On aarch64 hosts with 64K pages, the platform bus MMIO allocator can
> >> place device regions (such as the 1KB "tpm-ppi" region) at offsets
> >> that are not aligned to the host page size. This causes unnecessary
> >> and noisy VFIO IOMMU warnings when starting VMs configured with
> >> passed-through PCI devices:
> >>
> >> vfio_listener_valid_section received unaligned region tpm-ppi
> >> iova=0xc005000 offset_within_region=0x0
> >> qemu_real_host_page_size=0x10000
> >
> > Why does vfio care about the tpm-ppi region? I thought vfio
> > was only for passthrough devices, not for normal ones.
>
> It's caught by the VFIO listener which doesn't filer per device, it
> covers the entire address space.
>
> This is a benign address mis-alignment warning of the tpm-ppi memory
> region and VFIO simply skips the region.
That sounds like the problem then is that VFIO is warning about
things that are not in any way going to cause an issue. We should
stop it from doing that, not change the rest of the platform
because its warnings are over-broad.
> OK. Let's extend vfio_known_safe_misalignment() instead as done
> by commit 851d6d1a0ff2 ("vfio/common: remove spurious tpm-crb-cmd
> misalignment warning").
That seems like vfio is gradually accumulating a very
specific list of "we know this thing is misaligned" every
time. That is clearly wrong -- any device anywhere on the
board is allowed to have a non-aligned memory region. Those
are totally normal.
I think the vfio code needs to change so that it's only checking
the stuff that's actually vfio related. Drop the "we have a
whitelist" approach, please.
-- PMM
