On 4/7/26 03:41, Yanfeng Liu wrote:

Philippe,

The v1 always creates UART1 carelessly, then Peter suggested following
5d8a250f9068 (openrisc) and e7100972f2 (arm) to reduce guest breakage.

Oh I missed that. I'm confused because I thought not checking for
backend use of a chardev (in particular calling serial_hd) was part
of Peter's recommendations, since he did that cleanup years ago. I'll
let him finish his review of your series then; simply ignore my
comments.

Regards,

Phil.


I looked around and noticed the pattern is used in arm/virt, arm/msf2-
soc, arm/kzm, xrtensa/sim, and ppc/e500 etc.

Please give me clear direction here.

Regards,
Yanfeng


On Fri, 2026-07-03 at 11:31 +0200, Philippe Mathieu-Daudé wrote:
Hi,

On 3/7/26 06:24, Yanfeng Liu wrote:
This adds optional UART1 to RiscV virt board if required at
runtime to simplify multicore development.

Note that UART0 remains default serial_hd(0) and it is:

- the lowest address UART
- first serial in DTB
- behind /aliases/serial0 in DTB
- the /chosen/stdout-path in DTB

Signed-off-by: Yanfeng Liu <[email protected]>
---
   docs/system/riscv/virt.rst |  5 ++++-
   hw/riscv/virt-acpi-build.c | 12 ++++++++----
   hw/riscv/virt.c            | 39 ++++++++++++++++++++++++++++-----
-----
   include/hw/riscv/virt.h    |  3 +++
   4 files changed, 44 insertions(+), 15 deletions(-)


@@ -1567,6 +1579,13 @@ static void virt_machine_init(MachineState
*machine)
           0, qdev_get_gpio_in(mmio_irqchip, UART0_IRQ), 399193,
           serial_hd(0), DEVICE_LITTLE_ENDIAN);
+    if (serial_hd(1)) {

Checking for chardev backend connected to map a peripheral block
is an anti-pattern; the block exists on HW regardless.

+        serial_mm_init(system_memory, s->memmap[VIRT_UART1].base,
+            0, qdev_get_gpio_in(mmio_irqchip, UART1_IRQ), 399193,
+            serial_hd(1), DEVICE_LITTLE_ENDIAN);
+        s->uart1_present = true;

Thus we want to always instantiate all UART peripherals.

If you drop the uart1_present field then the patch LGTM.

+    }
+
       sysbus_create_simple("goldfish_rtc", s-
memmap[VIRT_RTC].base,
           qdev_get_gpio_in(mmio_irqchip, RTC_IRQ));
diff --git a/include/hw/riscv/virt.h b/include/hw/riscv/virt.h
index 18a2a323a3..7d57c8292e 100644
--- a/include/hw/riscv/virt.h
+++ b/include/hw/riscv/virt.h
@@ -59,6 +59,7 @@ struct RISCVVirtState {
       int aia_guests;
       char *oem_id;
       char *oem_table_id;
+    bool uart1_present;
       OnOffAuto acpi;
       const MemMapEntry *memmap;
       struct GPEXHost *gpex_host;




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