Replace definition of vector attribute, remove unlikely, and detect endianness from __BYTE_ORDER__.
Signed-off-by: Pierrick Bouvier <[email protected]> --- tests/tcg/ppc64/vector.c | 11 ++++++----- tests/tcg/ppc64/vsx_f2i_nan.c | 7 ++++--- 2 files changed, 10 insertions(+), 8 deletions(-) diff --git a/tests/tcg/ppc64/vector.c b/tests/tcg/ppc64/vector.c index cbf4ae93323..70491d59251 100644 --- a/tests/tcg/ppc64/vector.c +++ b/tests/tcg/ppc64/vector.c @@ -1,6 +1,7 @@ #include <assert.h> #include <stdint.h> -#include "qemu/compiler.h" + +#define vector __attribute__((altivec(vector__))) int main(void) { @@ -15,28 +16,28 @@ int main(void) vector __uint128_t vbc_qi_src; asm("vextractbm %0, %1" : "=r" (result_wi) : "v" (vbc_bi_src)); -#if HOST_BIG_ENDIAN +#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__ assert(result_wi == 0b1101111111000011); #else assert(result_wi == 0b1100001111111011); #endif asm("vextracthm %0, %1" : "=r" (result_wi) : "v" (vbc_hi_src)); -#if HOST_BIG_ENDIAN +#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__ assert(result_wi == 0b10010011); #else assert(result_wi == 0b11001001); #endif asm("vextractwm %0, %1" : "=r" (result_wi) : "v" (vbc_wi_src)); -#if HOST_BIG_ENDIAN +#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__ assert(result_wi == 0b0011); #else assert(result_wi == 0b1100); #endif asm("vextractdm %0, %1" : "=r" (result_wi) : "v" (vbc_di_src)); -#if HOST_BIG_ENDIAN +#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__ assert(result_wi == 0b10); #else assert(result_wi == 0b01); diff --git a/tests/tcg/ppc64/vsx_f2i_nan.c b/tests/tcg/ppc64/vsx_f2i_nan.c index 94b1a4eb02d..6a9d54faf52 100644 --- a/tests/tcg/ppc64/vsx_f2i_nan.c +++ b/tests/tcg/ppc64/vsx_f2i_nan.c @@ -1,5 +1,6 @@ #include <stdio.h> -#include "qemu/compiler.h" + +#define vector __attribute__((altivec(vector__))) typedef vector float vsx_float32_vec_t; typedef vector double vsx_float64_vec_t; @@ -104,7 +105,7 @@ static inline vsx_uint64_vec_t vsx_mask_out_float32_vec_to_uint64_vec( static inline vsx_int32_vec_t vsx_mask_out_float64_vec_to_int32_vec( vsx_int32_vec_t v) { -#if HOST_BIG_ENDIAN +#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__ const vsx_int32_vec_t valid_lanes_mask = {-1, 0, -1, 0}; #else const vsx_int32_vec_t valid_lanes_mask = {0, -1, 0, -1}; @@ -209,7 +210,7 @@ static inline int test_vsx_conv_##SRC_T##_vec_to_##DEST_T##_vec( \ const int test_result = \ vsx_##DEST_T##_all_eq(expected_result, actual_result); \ \ - if (unlikely(test_result == 0)) { \ + if (test_result == 0) { \ fputs("FAIL: Conversion of " #SRC_T " vector to " #DEST_T \ " vector failed\n", stdout); \ fputs("Source values: ", stdout); \ -- 2.47.3
