This commit adds a MemoryRegion alias to support PSP access to TSP SDRAM through shared memory remapping.
The TSP coprocessor exposes one DRAM alias: - remap maps PSP DRAM at 0x42E000000 to TSP SDRAM offset 0x0 These mappings follow the default SCU register configuration used by the ASPEED SDK firmware, which defines the memory window mapping between PSP and TSP. Set TSP CPUID 5. Signed-off-by: Jamin Lin <[email protected]> --- include/hw/misc/aspeed_scu.h | 1 + hw/arm/aspeed_ast27x0-fc.c | 2 ++ hw/arm/aspeed_ast27x0-tsp.c | 3 +++ hw/arm/aspeed_ast27x0.c | 2 ++ hw/misc/aspeed_scu.c | 18 ++++++++++++++++++ 5 files changed, 26 insertions(+) diff --git a/include/hw/misc/aspeed_scu.h b/include/hw/misc/aspeed_scu.h index ae49f6ab9a..1c3a220d96 100644 --- a/include/hw/misc/aspeed_scu.h +++ b/include/hw/misc/aspeed_scu.h @@ -48,6 +48,7 @@ struct Aspeed2700SCUState { MemoryRegion dram_remap_alias[3]; MemoryRegion *dram; int ssp_cpuid; + int tsp_cpuid; }; #define AST2400_A1_SILICON_REV 0x02010303U diff --git a/hw/arm/aspeed_ast27x0-fc.c b/hw/arm/aspeed_ast27x0-fc.c index ce245118af..113248b98e 100644 --- a/hw/arm/aspeed_ast27x0-fc.c +++ b/hw/arm/aspeed_ast27x0-fc.c @@ -104,6 +104,8 @@ static bool ast2700fc_ca35_init(MachineState *machine, Error **errp) sc->uarts_num, serial_hd(2)); object_property_set_int(OBJECT(&s->ca35), "ssp-cpuid", 4, &error_abort); + object_property_set_int(OBJECT(&s->ca35), "tsp-cpuid", 5, + &error_abort); if (!qdev_realize(DEVICE(&s->ca35), NULL, errp)) { return false; } diff --git a/hw/arm/aspeed_ast27x0-tsp.c b/hw/arm/aspeed_ast27x0-tsp.c index 4212e7bd4c..369576bde3 100644 --- a/hw/arm/aspeed_ast27x0-tsp.c +++ b/hw/arm/aspeed_ast27x0-tsp.c @@ -232,6 +232,9 @@ static void aspeed_soc_ast27x0tsp_realize(DeviceState *dev_soc, Error **errp) memory_region_add_subregion(s->memory, sc->memmap[ASPEED_DEV_SCUIO], &a->scuio_alias); + /* SDRAM remap alias used by PSP to access TSP SDRAM */ + memory_region_add_subregion(&s->sdram, 0, &a->scu->dram_remap_alias[2]); + /* INTC */ if (!sysbus_realize(SYS_BUS_DEVICE(&a->intc[0]), errp)) { return; diff --git a/hw/arm/aspeed_ast27x0.c b/hw/arm/aspeed_ast27x0.c index 10d3e35a9b..9c13efa3a6 100644 --- a/hw/arm/aspeed_ast27x0.c +++ b/hw/arm/aspeed_ast27x0.c @@ -444,6 +444,8 @@ static void aspeed_soc_ast2700_init(Object *obj) "hw-prot-key"); object_property_add_alias(obj, "ssp-cpuid", OBJECT(&a->scu), "ssp-cpuid"); + object_property_add_alias(obj, "tsp-cpuid", OBJECT(&a->scu), + "tsp-cpuid"); object_initialize_child(obj, "scuio", &s->scuio, TYPE_ASPEED_2700_SCUIO); qdev_prop_set_uint32(DEVICE(&s->scuio), "silicon-rev", diff --git a/hw/misc/aspeed_scu.c b/hw/misc/aspeed_scu.c index cc0aa3234a..88c1a57299 100644 --- a/hw/misc/aspeed_scu.c +++ b/hw/misc/aspeed_scu.c @@ -958,10 +958,28 @@ static void aspeed_2700_scu_realize(DeviceState *dev, Error **errp) "ssp.dram.remap2", a->dram, 0x2c000000, 0x05880000); } + + if (a->tsp_cpuid > 0) { + if (!a->dram) { + error_setg(errp, TYPE_ASPEED_2700_SCU ": 'dram' link not set"); + return; + } + /* + * The TSP coprocessor uses one memory alias (remap) to access a shared + * region in the PSP DRAM: + * + * - remap maps PSP DRAM at 0x42E000000 (size: 32MB) to TSP SDRAM + * offset 0x0 + */ + memory_region_init_alias(&a->dram_remap_alias[2], OBJECT(a), + "tsp.dram.remap", a->dram, + 0x2e000000, 32 * MiB); + } } static const Property aspeed_2700_scu_properties[] = { DEFINE_PROP_INT32("ssp-cpuid", Aspeed2700SCUState, ssp_cpuid, -1), + DEFINE_PROP_INT32("tsp-cpuid", Aspeed2700SCUState, tsp_cpuid, -1), DEFINE_PROP_LINK("dram", Aspeed2700SCUState, dram, TYPE_MEMORY_REGION, MemoryRegion *), }; -- 2.43.0
