On 9/7/26 21:21, Miao Wang via B4 Relay wrote:
From: Miao Wang <[email protected]>
Add a comment to explain the endianness of the pvscsi device. We have
no information about the endianness should be little-endian or CPU
native endian because the current driver code is designed to work only
on x86 and is not endianness aware. We assume that the pvscsi device is
implicitly little-endian.
Signed-off-by: Miao Wang <[email protected]>
---
hw/scsi/vmw_pvscsi.h | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/hw/scsi/vmw_pvscsi.h b/hw/scsi/vmw_pvscsi.h
index
a3ae517e19934c2377cd84efe993264917ecefde..defff9e179ecbe888194e3f31547ecbee801f432
100644
--- a/hw/scsi/vmw_pvscsi.h
+++ b/hw/scsi/vmw_pvscsi.h
@@ -108,6 +108,20 @@ enum PVSCSICommands {
#define PVSCSI_COMMAND_PROCESSING_FAILED (-1)
#define PVSCSI_COMMAND_NOT_ENOUGH_DATA (-2)
+/*
+ * About endianess for the below structs:
+ *
+ * These structs are used to describe the data that is exchanged between the
+ * guest and the PVSCSI device. The endianess of the fields in these structs
+ * is not defined by any standard. The current implemented drivers are designed
+ * to only work on x86 architecture, so there is no endianess awareness in the
+ * drivers and thus we have no idea whether the fields should be in little-
+ * endian or target native endian format.
+ *
+ * Considering the above, we assume that PVSCSI is implicitly little-endian and
+ * expect the fields in these structs to be in little-endian format.
+ */
Thank you very much!
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
