For the time being we disable AMX TILE in partition processor features and CPUID b/c AMX TILE XSAVE state (XTILE_DATA) is 8KB, which exceeds the current fixed 4KB XSAVE buffer size.
For now we filter it until buffer sizing is computed dynamically from CPUID. Signed-off-by: Magnus Kulke <[email protected]> --- accel/mshv/mshv-all.c | 8 ++++++++ target/i386/mshv/mshv-cpu.c | 16 ++++++++++++++++ 2 files changed, 24 insertions(+) diff --git a/accel/mshv/mshv-all.c b/accel/mshv/mshv-all.c index 72721d0f0d..5e8756ede2 100644 --- a/accel/mshv/mshv-all.c +++ b/accel/mshv/mshv-all.c @@ -203,6 +203,14 @@ static int create_partition(int mshv_fd, int *vm_fd) /* enable all */ disabled_xsave_features.as_uint64 = 0; + /* + * AMX TILE XSAVE state (XTILE_DATA) is 8KB, which exceeds the + * current fixed 4KB XSAVE buffer size. + */ + disabled_xsave_features.amx_tile_support = 1; + disabled_xsave_features.amx_bf16_support = 1; + disabled_xsave_features.amx_int8_support = 1; + disabled_xsave_features.amx_fp16_support = 1; /* * query host for supported processor features and disable unsupported diff --git a/target/i386/mshv/mshv-cpu.c b/target/i386/mshv/mshv-cpu.c index 1c433c408c..8eca01a8fa 100644 --- a/target/i386/mshv/mshv-cpu.c +++ b/target/i386/mshv/mshv-cpu.c @@ -2156,6 +2156,22 @@ uint32_t mshv_get_supported_cpuid(uint32_t func, uint32_t idx, int reg) */ ret &= ~CPUID_7_0_ECX_LA57; } + if (func == 0x07 && idx == 0 && reg == R_EDX) { + /* + * AMX TILE XSAVE state (XTILE_DATA) is 8KB, which exceeds the + * current fixed 4KB XSAVE buffer size. Filter until buffer + * sizing is computed dynamically from CPUID. + */ + ret &= ~CPUID_7_0_EDX_AMX_TILE; + ret &= ~CPUID_7_0_EDX_AMX_BF16; + ret &= ~CPUID_7_0_EDX_AMX_INT8; + } + if (func == 0x07 && idx == 1 && reg == R_EAX) { + ret &= ~CPUID_7_1_EAX_AMX_FP16; + } + if (func == 0x07 && idx == 1 && reg == R_EDX) { + ret &= ~CPUID_7_1_EDX_AMX_COMPLEX; + } return ret; } -- 2.34.1
