From: Daniel Henrique Barboza <[email protected]>
We must check if IOHGATP_PPN is 16kb aligned for non-bare GATP modes.
Fixes: 69a9ae4836 ("hw/riscv/riscv-iommu: add ATS support")
Resolves: https://gitlab.com/qemu-project/qemu/-/work_items/3550
Signed-off-by: Daniel Henrique Barboza <[email protected]>
Reviewed-by: Chao Liu <[email protected]>
Reviewed-by: Nutty Liu <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Alistair Francis <[email protected]>
(cherry picked from commit bf274c54295c81aeda3835e2e0bc971f0bd57f47)
Signed-off-by: Michael Tokarev <[email protected]>
diff --git a/hw/riscv/riscv-iommu.c b/hw/riscv/riscv-iommu.c
index 3f0392c2528..e9e204109a9 100644
--- a/hw/riscv/riscv-iommu.c
+++ b/hw/riscv/riscv-iommu.c
@@ -829,6 +829,21 @@ static bool
riscv_iommu_validate_device_ctx(RISCVIOMMUState *s,
return false;
}
+ if (gatp != RISCV_IOMMU_DC_IOHGATP_MODE_BARE) {
+ uint64_t iohgatp_ppn = get_field(ctx->gatp,
+ RISCV_IOMMU_DC_IOHGATP_PPN);
+
+ /*
+ * One of the conditions for a misconfigured DDT entry
+ * according to the riscv-spec: "DC.iohgatp.MODE is not
+ * Bare and the root page table (address) determined by
+ * DC.iohgatp.PPN is not aligned to a 16-KiB boundary."
+ */
+ if (PPN_PHYS(iohgatp_ppn) & ((1ULL << 14) - 1)) {
+ return false;
+ }
+ }
+
fsc_mode = get_field(ctx->satp, RISCV_IOMMU_DC_FSC_MODE);
if (ctx->tc & RISCV_IOMMU_DC_TC_PDTV) {
--
2.47.3
