On Mon, 13 Jul 2026 at 15:49, Fabiano Rosas <[email protected]> wrote: > > Peter Maydell <[email protected]> writes: > > - ppc TCG, in powerpc_checkstop(), for a machine check exception I think > > 1) The Checkstop state is the state the (modern) architecture prescribes > the machine transitions to when: a) machine check happens but machine > check exceptions are disabled or b) hard-to-recover storage errors. On > older user manuals I also see occurrences of checkstop when (a) above > happens and a "debug bit" is also set. > > 603 UM: > "[cpu] must terminate operation by internally gating off all clocks, and > release all outputs to the high impedance state" > > 750cx UM: > "When a processor is in checkstop state, instruction processing is > suspended and generally cannot resume without the processor being > reset."
Thanks. So since this is in TCG, is this for the case "we emulated the CPU ending up in a checkstop situation", rather than "the real host hardware is broken" ? Can the guest deliberately provoke real hardware into this state, or is it only something you can get into when the h/w is broken ? -- PMM
