mips_gic_init() calls qemu_register_reset(gic_reset, s), but there is no matching qemu_unregister_reset() in an instance_finalize. This leaks a reset handler every time the type is introspected via device-list-properties (object_new + object_unref). The following patch makes each legacy reset handler visible in the composition tree under /machine/reset-container/legacy-reset[*], which turns this pre-existing leak into a device-introspect-test failure.
Move the registration to mips_gic_realize(), matching every other in-tree interrupt controller. AI-used-for: code (refactoring) Signed-off-by: Alexander Graf <[email protected]> --- hw/intc/mips_gic.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/intc/mips_gic.c b/hw/intc/mips_gic.c index 4777c70d6b..c0f1501bcc 100644 --- a/hw/intc/mips_gic.c +++ b/hw/intc/mips_gic.c @@ -394,7 +394,6 @@ static void mips_gic_init(Object *obj) memory_region_init_io(&s->mr, OBJECT(s), &gic_ops, s, "mips-gic", GIC_ADDRSPACE_SZ); sysbus_init_mmio(sbd, &s->mr); - qemu_register_reset(gic_reset, s); } static void mips_gic_realize(DeviceState *dev, Error **errp) @@ -430,6 +429,7 @@ static void mips_gic_realize(DeviceState *dev, Error **errp) for (i = 0; i < s->num_irq; i++) { s->irq_state[i].irq = qdev_get_gpio_in(dev, i); } + qemu_register_reset(gic_reset, s); } static const Property mips_gic_properties[] = { -- 2.47.1
