Expand the macro at each use site. Merge the two arrays and index by fpcr_ah.
Signed-off-by: Richard Henderson <[email protected]> --- target/arm/tcg/translate-sve.c | 41 +++++++++++++++++++++------------- 1 file changed, 25 insertions(+), 16 deletions(-) diff --git a/target/arm/tcg/translate-sve.c b/target/arm/tcg/translate-sve.c index e77d017656..59a4f9a59b 100644 --- a/target/arm/tcg/translate-sve.c +++ b/target/arm/tcg/translate-sve.c @@ -4415,19 +4415,6 @@ TRANS_FEAT_NONSTREAMING(FTSMUL, aa64_sve, gen_gvec_fpst_arg_zzz, *** SVE Floating Point Arithmetic - Predicated Group */ -#define DO_ZPZZ_AH_FP(NAME, FEAT, name, ah_name) \ - static gen_helper_gvec_4_ptr * const name##_zpzz_fns[4] = { \ - NULL, gen_helper_##name##_h, \ - gen_helper_##name##_s, gen_helper_##name##_d \ - }; \ - static gen_helper_gvec_4_ptr * const name##_ah_zpzz_fns[4] = { \ - NULL, gen_helper_##ah_name##_h, \ - gen_helper_##ah_name##_s, gen_helper_##ah_name##_d \ - }; \ - TRANS_FEAT(NAME, FEAT, gen_gvec_fpst_arg_zpzz, \ - s->fpcr_ah ? name##_ah_zpzz_fns[a->esz] : \ - name##_zpzz_fns[a->esz], a) - #define DO_ZPZZ_AH_FP_B16(NAME, FEAT, name, ah_name) \ static gen_helper_gvec_4_ptr * const name##_zpzz_fns[4] = { \ gen_helper_##name##_b16, gen_helper_##name##_h, \ @@ -4489,7 +4476,14 @@ static gen_helper_gvec_4_ptr * const sve_fminnum_fns[4] = { TRANS_FEAT(FMINNM_zpzz, aa64_sme_or_sve, gen_gvec_fpst_arg_zpzz, sve_fminnum_fns[a->esz], a) -DO_ZPZZ_AH_FP(FABD, aa64_sme_or_sve, sve_fabd, sve_ah_fabd) +static gen_helper_gvec_4_ptr * const sve_fabd_zpzz_fns[4][2] = { + { NULL, NULL }, + { gen_helper_sve_fabd_h, gen_helper_sve_ah_fabd_h }, + { gen_helper_sve_fabd_s, gen_helper_sve_ah_fabd_s }, + { gen_helper_sve_fabd_d, gen_helper_sve_ah_fabd_d }, +}; +TRANS_FEAT(FABD, aa64_sme_or_sve, gen_gvec_fpst_arg_zpzz, + sve_fabd_zpzz_fns[a->esz][s->fpcr_ah], a) static gen_helper_gvec_4_ptr * const sve_fscalbn_zpzz_fns[4] = { NULL, @@ -8134,8 +8128,23 @@ static gen_helper_gvec_4_ptr * const sve_fminnmp_zpzz_fns[4] = { TRANS_FEAT(FMINNMP, aa64_sme_or_sve2, gen_gvec_fpst_arg_zpzz, sve_fminnmp_zpzz_fns[a->esz], a) -DO_ZPZZ_AH_FP(FMAXP, aa64_sme_or_sve2, sve2_fmaxp_zpzz, sve2_ah_fmaxp_zpzz) -DO_ZPZZ_AH_FP(FMINP, aa64_sme_or_sve2, sve2_fminp_zpzz, sve2_ah_fminp_zpzz) +static gen_helper_gvec_4_ptr * const sve_fmaxp_zpzz_fns[4][2] = { + { NULL, NULL }, + { gen_helper_sve2_fmaxp_zpzz_h, gen_helper_sve2_ah_fmaxp_zpzz_h }, + { gen_helper_sve2_fmaxp_zpzz_s, gen_helper_sve2_ah_fmaxp_zpzz_s }, + { gen_helper_sve2_fmaxp_zpzz_d, gen_helper_sve2_ah_fmaxp_zpzz_d }, +}; +TRANS_FEAT(FMAXP, aa64_sme_or_sve, gen_gvec_fpst_arg_zpzz, + sve_fmaxp_zpzz_fns[a->esz][s->fpcr_ah], a) + +static gen_helper_gvec_4_ptr * const sve_fminp_zpzz_fns[4][2] = { + { NULL, NULL }, + { gen_helper_sve2_fminp_zpzz_h, gen_helper_sve2_ah_fminp_zpzz_h }, + { gen_helper_sve2_fminp_zpzz_s, gen_helper_sve2_ah_fminp_zpzz_s }, + { gen_helper_sve2_fminp_zpzz_d, gen_helper_sve2_ah_fminp_zpzz_d }, +}; +TRANS_FEAT(FMINP, aa64_sme_or_sve, gen_gvec_fpst_arg_zpzz, + sve_fminp_zpzz_fns[a->esz][s->fpcr_ah], a) static bool do_fmmla(DisasContext *s, arg_rrrr_esz *a, gen_helper_gvec_4_ptr *fn) -- 2.43.0
