Expand the macro at each use site.
Signed-off-by: Richard Henderson <[email protected]>
---
target/arm/tcg/translate-sve.c | 59 ++++++++++++++++++++++++++--------
1 file changed, 46 insertions(+), 13 deletions(-)
diff --git a/target/arm/tcg/translate-sve.c b/target/arm/tcg/translate-sve.c
index ff6032a07f..e77d017656 100644
--- a/target/arm/tcg/translate-sve.c
+++ b/target/arm/tcg/translate-sve.c
@@ -4428,14 +4428,6 @@ TRANS_FEAT_NONSTREAMING(FTSMUL, aa64_sve,
gen_gvec_fpst_arg_zzz,
s->fpcr_ah ? name##_ah_zpzz_fns[a->esz] : \
name##_zpzz_fns[a->esz], a)
-/* Similar, but for insns where sz == 0 encodes bfloat16 */
-#define DO_ZPZZ_FP_B16(NAME, FEAT, name) \
- static gen_helper_gvec_4_ptr * const name##_zpzz_fns[4] = { \
- gen_helper_##name##_b16, gen_helper_##name##_h, \
- gen_helper_##name##_s, gen_helper_##name##_d \
- }; \
- TRANS_FEAT(NAME, FEAT, gen_gvec_fpst_arg_zpzz, name##_zpzz_fns[a->esz], a)
-
#define DO_ZPZZ_AH_FP_B16(NAME, FEAT, name, ah_name) \
static gen_helper_gvec_4_ptr * const name##_zpzz_fns[4] = { \
gen_helper_##name##_b16, gen_helper_##name##_h, \
@@ -4449,13 +4441,54 @@ TRANS_FEAT_NONSTREAMING(FTSMUL, aa64_sve,
gen_gvec_fpst_arg_zzz,
s->fpcr_ah ? name##_ah_zpzz_fns[a->esz] : \
name##_zpzz_fns[a->esz], a)
-DO_ZPZZ_FP_B16(FADD_zpzz, aa64_sme_or_sve, sve_fadd)
-DO_ZPZZ_FP_B16(FSUB_zpzz, aa64_sme_or_sve, sve_fsub)
-DO_ZPZZ_FP_B16(FMUL_zpzz, aa64_sme_or_sve, sve_fmul)
+static gen_helper_gvec_4_ptr * const sve_fadd_zpzz_fns[4] = {
+ gen_helper_sve_fadd_b16,
+ gen_helper_sve_fadd_h,
+ gen_helper_sve_fadd_s,
+ gen_helper_sve_fadd_d
+};
+TRANS_FEAT(FADD_zpzz, aa64_sme_or_sve, gen_gvec_fpst_arg_zpzz,
+ sve_fadd_zpzz_fns[a->esz], a)
+
+static gen_helper_gvec_4_ptr * const sve_fsub_zpzz_fns[4] = {
+ gen_helper_sve_fsub_b16,
+ gen_helper_sve_fsub_h,
+ gen_helper_sve_fsub_s,
+ gen_helper_sve_fsub_d
+};
+TRANS_FEAT(FSUB_zpzz, aa64_sme_or_sve, gen_gvec_fpst_arg_zpzz,
+ sve_fsub_zpzz_fns[a->esz], a)
+
+static gen_helper_gvec_4_ptr * const sve_fmul_zpzz_fns[4] = {
+ gen_helper_sve_fmul_b16,
+ gen_helper_sve_fmul_h,
+ gen_helper_sve_fmul_s,
+ gen_helper_sve_fmul_d
+};
+TRANS_FEAT(FMUL_zpzz, aa64_sme_or_sve, gen_gvec_fpst_arg_zpzz,
+ sve_fmul_zpzz_fns[a->esz], a)
+
DO_ZPZZ_AH_FP_B16(FMIN_zpzz, aa64_sme_or_sve, sve_fmin, sve_ah_fmin)
DO_ZPZZ_AH_FP_B16(FMAX_zpzz, aa64_sme_or_sve, sve_fmax, sve_ah_fmax)
-DO_ZPZZ_FP_B16(FMINNM_zpzz, aa64_sme_or_sve, sve_fminnum)
-DO_ZPZZ_FP_B16(FMAXNM_zpzz, aa64_sme_or_sve, sve_fmaxnum)
+
+static gen_helper_gvec_4_ptr * const sve_fmaxnum_fns[4] = {
+ gen_helper_sve_fmaxnum_b16,
+ gen_helper_sve_fmaxnum_h,
+ gen_helper_sve_fmaxnum_s,
+ gen_helper_sve_fmaxnum_d
+};
+TRANS_FEAT(FMAXNM_zpzz, aa64_sme_or_sve, gen_gvec_fpst_arg_zpzz,
+ sve_fmaxnum_fns[a->esz], a)
+
+static gen_helper_gvec_4_ptr * const sve_fminnum_fns[4] = {
+ gen_helper_sve_fminnum_b16,
+ gen_helper_sve_fminnum_h,
+ gen_helper_sve_fminnum_s,
+ gen_helper_sve_fminnum_d
+};
+TRANS_FEAT(FMINNM_zpzz, aa64_sme_or_sve, gen_gvec_fpst_arg_zpzz,
+ sve_fminnum_fns[a->esz], a)
+
DO_ZPZZ_AH_FP(FABD, aa64_sme_or_sve, sve_fabd, sve_ah_fabd)
static gen_helper_gvec_4_ptr * const sve_fscalbn_zpzz_fns[4] = {
--
2.43.0
