On Fri, 17 Jul 2026 at 18:44, Tao Ding <[email protected]> wrote: > > In TCG mode, cpu_pre_save is called when saving state and cpu_post_load > is called when restore state. There are two key functions > write_cpustate_to_list > and write_list_to_cpustate that use kvm_to_cpreg_id to obtain the regidx. > > However, during the processing of kvm_to_cpreg_id, secure state information > will > be lost in aarch32 cpu. > The code in kvm_to_cpreg_id always add the NS flag. > "cpregid |= CP_REG_AA32_NS_MASK;" > > The final result is that after migration, some secure registers were not > restored, > such as DACR_S. And this register will affect the CPU's access to the address. > > To fix this issue, a new function kvm_to_cpreg_id_with_secure is added to > restore secure bit information. Call different functions according to > different modes to keep KVM unaffected.
This is definitely a bug, but I don't think this patch is the right fix for it. The problem is that the 64-bit kvmid doesn't currently have the S-vs-NS information in it, and so any time that we round-trip between a 32-bit QEMU hashtable index and the kvmid we lose that information. The fix then is to define a way to keep the S/NS information in the KVM ID format and have the existing kvm_to_cpreg_id() and cpreg_to_kvm_id() functions do the appropriate thing to convert. I have a patch which I think ought to do this, but I also noticed some other problems in our handling of secure/non-secure banked aarch32 cpregs which I'm investigating. I'll try to send out a patchset next week. Thanks for the clear repro instructions -- those are very helpful. thanks -- PMM
