Replace the generic serial-mm device with the K230 DW 8250-compatible UART model added in the previous patch. All five UART ports are instantiated as children of the SoC and wired to their respective PLIC interrupts.
Signed-off-by: zhenbaii <[email protected]> --- hw/riscv/k230.c | 33 ++++++++++++++++++++++----------- include/hw/riscv/k230.h | 6 ++++-- 2 files changed, 26 insertions(+), 13 deletions(-) diff --git a/hw/riscv/k230.c b/hw/riscv/k230.c index 502281c52cff1dce6febb7487dfdefefe6363e9c..d49fa23448f38dfed45a570eb5bece64519bfe27 100644 --- a/hw/riscv/k230.c +++ b/hw/riscv/k230.c @@ -29,7 +29,6 @@ #include "hw/riscv/machines-qom.h" #include "hw/intc/riscv_aclint.h" #include "hw/intc/sifive_plic.h" -#include "hw/char/serial-mm.h" #include "hw/misc/unimp.h" /* Align K230_SDK k230_canmv_defconfig */ @@ -111,6 +110,11 @@ static void k230_soc_init(Object *obj) object_initialize_child(obj, "k230-wdt0", &s->wdt[0], TYPE_K230_WDT); object_initialize_child(obj, "k230-wdt1", &s->wdt[1], TYPE_K230_WDT); + for (int i = 0; i < K230_UART_COUNT; i++) { + g_autofree char *name = g_strdup_printf("k230-uart%d", i); + object_initialize_child(obj, name, &s->uart[i], TYPE_K230_UART); + } + qdev_prop_set_uint32(DEVICE(cpu0), "hartid-base", 0); qdev_prop_set_string(DEVICE(cpu0), "cpu-type", TYPE_RISCV_CPU_THEAD_C908); qdev_prop_set_uint64(DEVICE(cpu0), "resetvec", @@ -136,19 +140,26 @@ static DeviceState *k230_create_plic(int base_hartid, int hartid_count) memmap[K230_DEV_PLIC].size); } -static void k230_create_uart(MemoryRegion *sys_mem, DeviceState *plic, - int index) +static void k230_create_uart(K230SoCState *s, DeviceState *plic, int index) { int uart_dev = K230_DEV_UART0 + index; - g_autofree char *name = g_strdup_printf("uart%d", index); + g_autofree char *unimpl_name = g_strdup_printf("uart%d", index); + DeviceState *dev = DEVICE(&s->uart[index]); - /* Cover the non-16550 part of the SDK's 0x1000 UART window. */ - create_unimplemented_device(name, memmap[uart_dev].base, - memmap[uart_dev].size); + qdev_prop_set_chr(dev, "chardev", serial_hd(index)); - serial_mm_init(sys_mem, memmap[uart_dev].base, 2, - qdev_get_gpio_in(plic, K230_UART0_IRQ + index), - 399193, serial_hd(index), DEVICE_LITTLE_ENDIAN); + if (!sysbus_realize(SYS_BUS_DEVICE(dev), &error_fatal)) { + return; + } + + sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, memmap[uart_dev].base); + sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, + qdev_get_gpio_in(plic, K230_UART0_IRQ + index)); + + /* Cover the non-16550 part of the SDK's 0x1000 UART window. */ + create_unimplemented_device(unimpl_name, + memmap[uart_dev].base + 0x100, + memmap[uart_dev].size - 0x100); } static void k230_soc_realize(DeviceState *dev, Error **errp) @@ -188,7 +199,7 @@ static void k230_soc_realize(DeviceState *dev, Error **errp) /* UART */ for (int i = 0; i < K230_UART_COUNT; i++) { - k230_create_uart(sys_mem, DEVICE(s->c908_plic), i); + k230_create_uart(s, DEVICE(s->c908_plic), i); } /* Watchdog */ diff --git a/include/hw/riscv/k230.h b/include/hw/riscv/k230.h index 592e1c26bf8a8f8a1c66653ff9b568fbfe98a3ea..fed0357c2b9e1f5254cb157e0cd4d75d4946d1a1 100644 --- a/include/hw/riscv/k230.h +++ b/include/hw/riscv/k230.h @@ -17,10 +17,13 @@ #include "hw/core/boards.h" #include "hw/riscv/riscv_hart.h" +#include "hw/char/k230_uart.h" #include "hw/watchdog/k230_wdt.h" #define C908_CPU_HARTID (0) +#define K230_UART_COUNT 5 + #define TYPE_RISCV_K230_SOC "riscv.k230.soc" #define RISCV_K230_SOC(obj) \ OBJECT_CHECK(K230SoCState, (obj), TYPE_RISCV_K230_SOC) @@ -32,6 +35,7 @@ typedef struct K230SoCState { /*< public >*/ RISCVHartArrayState c908_cpu; /* Small core */ + K230UartState uart[K230_UART_COUNT]; K230WdtState wdt[2]; MemoryRegion sram; MemoryRegion bootrom; @@ -131,8 +135,6 @@ enum { K230_WDT1_IRQ = 108, }; -#define K230_UART_COUNT 5 - /* * Integrates with the interrupt controller (PLIC), * which can process 208 interrupt external sources -- 2.48.1
