botszhuang <[email protected]> 於 2026年7月24日週五 下午8:51寫道： > > hw/i2c/bcm2835_i2c: Correct CLKT register offset > > The Clock Stretch Timeout (CLKT) register for the BCM2835 I2C controller is > actually located at offset 0x1c, not 0x20. > > The previous incorrect value caused the guest OS to read from and write to > the wrong memory address when configuring the I2C timeout, which could lead > to unexpected controller behavior. > > Update the BCM2835_I2C_CLKT macro to match the hardware specification. > > Signed-off-by: botszhuang <[email protected]> > --- > include/hw/i2c/bcm2835_i2c.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/include/hw/i2c/bcm2835_i2c.h b/include/hw/i2c/bcm2835_i2c.h > index 45f876df22..519c65f765 100644 > --- a/include/hw/i2c/bcm2835_i2c.h > +++ b/include/hw/i2c/bcm2835_i2c.h > @@ -38,7 +38,7 @@ OBJECT_DECLARE_SIMPLE_TYPE(BCM2835I2CState, BCM2835_I2C) > #define BCM2835_I2C_FIFO 0x10 /* FIFO */ > #define BCM2835_I2C_DIV 0x14 /* Clock Divider */ > #define BCM2835_I2C_DEL 0x18 /* Data Delay */ > -#define BCM2835_I2C_CLKT 0x20 /* Clock Stretch Timeout */ > +#define BCM2835_I2C_CLKT 0x1c /* Clock Stretch Timeout */ > > #define BCM2835_I2C_C_I2CEN BIT(15) /* I2C enable */ > #define BCM2835_I2C_C_INTR BIT(10) /* Interrupt on RXR */ > -- > 2.43.0 >
Tested-by: Nick Huang <[email protected]> -- Regards, Nick Huang
