On Wed, 22 Jul 2026 00:13:29 +0800, Tao Ding <[email protected]> wrote:
> diff --git a/hw/dma/k230_gsdma.c b/hw/dma/k230_gsdma.c
> new file mode 100644
> index 0000000000..1f76f62fa0
> --- /dev/null
> +++ b/hw/dma/k230_gsdma.c
> @@ -0,0 +1,532 @@
> [ ... skip 75 lines ... ]
> + /* Stride line size required for 2d mode */
> + uint32_t line_space = extract32(line_cfg, 16, 16);
> +
> + bool dat_mode = c->cfg & K230_GSDMA_CH_CFG_DAT_MODE;
> + bool src_fixed = c->cfg & K230_GSDMA_CH_CFG_SRC_FIXED;
> + bool dst_fixed = c->cfg & K230_GSDMA_CH_CFG_DST_FIXED;
The handling for chx_dat_endian is completely missing here. Could you please
check this register field in the TRM and implement its functionality?
> [ ... skip 39 lines ... ]
> + remaining -= chunk;
> + }
> +
> + if (!dat_mode) {
> + if (llt_cfg & K230_GSDMA_LLT_2D_MODE) { /*2d mode*/
> + src += line_size + line_space;
The 2D mode semantics here don't match the TRM.
According to the TRM, when in 2D mode and SRC_FIXED equals 1, the correct
behaviour is that SRC_ADDR should not increment.
There is currently no check here to determine whether SRC_FIXED is set to 1.
> [ ... skip 62 lines ... ]
> + return;
> + }
> +
> + addr = next;
> + }
> +
When CHx_CTL.START is written via MMIO, the entire llt is processed
synchronously. During this period, the vCPU is unable to stop, resume, or reset
command. This could potentially cause QEMU to be blocked here for an indefinite
amount of time.
For the implementation, please refer to the reference in i8257.c.
> [ ... skip 315 lines ... ]
> +static void k230_gsdma_class_init(ObjectClass *klass, const void *data)
> +{
> + DeviceClass *dc = DEVICE_CLASS(klass);
> +
> + dc->realize = k230_gsdma_realize;
> + device_class_set_legacy_reset(dc, k230_gsdma_reset);
This interface is no longer recommended for use. For further details, please
refer to the comments for this interface in qdev.h.
--
bbbbbq <[email protected]>
