On Mon, 2026-07-27 at 15:22 +0800, Flavien Solt wrote: > iommu-testdev writes ITD_DMA_WRITE_VAL with unspecified requester > attributes. RISC-V MSI remapping tests need to select an interrupt > identity in the payload. The MSI trap also identifies the device > through > MemTxAttrs.requester_id. > > Add a write-value register with the existing constant as its reset > default. Populate the requester ID from the PCI function. Existing > translation tests retain their payload while interrupt-remapping > tests > can issue a valid MSI for the test device. > > Signed-off-by: Flavien Solt <[email protected]> > Reviewed-by: Tao Tang <[email protected]> > Reviewed-by: Nutty Liu <[email protected]>
Acked-by: Alistair Francis <[email protected]> Alistair > --- > hw/misc/iommu-testdev.c | 14 ++++++++++++-- > include/hw/misc/iommu-testdev.h | 1 + > 2 files changed, 13 insertions(+), 2 deletions(-) > > diff --git a/hw/misc/iommu-testdev.c b/hw/misc/iommu-testdev.c > index 15eb6de..6428a57 100644 > --- a/hw/misc/iommu-testdev.c > +++ b/hw/misc/iommu-testdev.c > @@ -28,6 +28,7 @@ struct IOMMUTestDevState { > uint64_t dma_paddr; > uint32_t dma_len; > uint32_t dma_result; > + uint32_t dma_write_val; > bool dma_armed; /* armed until a trigger consumes the request */ > > AddressSpace *dma_as; /* IOMMU-mediated DMA AS for this device > */ > @@ -80,6 +81,7 @@ static void > iommu_testdev_maybe_run_dma(IOMMUTestDevState *s) > > /* Initialize MemTxAttrs from generic register. */ > attrs.secure = ITD_ATTRS_GET_SECURE(s->dma_attrs_cfg); > + attrs.requester_id = pci_requester_id(&s->parent_obj); > > space_valid = ITD_ATTRS_GET_SPACE_VALID(s->dma_attrs_cfg); > if (space_valid) { > @@ -97,12 +99,12 @@ static void > iommu_testdev_maybe_run_dma(IOMMUTestDevState *s) > > as = s->dma_as; > > - /* Step 1: Write ITD_DMA_WRITE_VAL to DMA address */ > + /* Step 1: Write the configured test value to DMA address */ > trace_iommu_testdev_dma_write(s->dma_vaddr, s->dma_len); > > for (int i = 0; i < s->dma_len; i++) { > /* Data is written in little-endian order */ > - write_buf[i] = (ITD_DMA_WRITE_VAL >> ((i % 4) * 8)) & 0xff; > + write_buf[i] = (s->dma_write_val >> ((i % 4) * 8)) & 0xff; > } > write_res = dma_memory_write(as, s->dma_vaddr, write_buf, > s->dma_len, attrs); > @@ -186,6 +188,9 @@ static uint64_t iommu_testdev_mmio_read(void > *opaque, hwaddr addr, > case ITD_REG_DMA_ATTRS: > value = s->dma_attrs_cfg; > break; > + case ITD_REG_DMA_WRITE_VAL: > + value = s->dma_write_val; > + break; > default: > value = 0; > break; > @@ -240,6 +245,9 @@ static void iommu_testdev_mmio_write(void > *opaque, hwaddr addr, uint64_t val, > case ITD_REG_DMA_ATTRS: > s->dma_attrs_cfg = data; > break; > + case ITD_REG_DMA_WRITE_VAL: > + s->dma_write_val = data; > + break; > default: > break; > } > @@ -263,6 +271,7 @@ static void iommu_testdev_realize(PCIDevice > *pdev, Error **errp) > s->dma_paddr = 0; > s->dma_len = 0; > s->dma_result = ITD_DMA_RESULT_IDLE; > + s->dma_write_val = ITD_DMA_WRITE_VAL; > s->dma_armed = false; > s->dma_attrs_cfg = ITD_ATTRS_SET_SPACE(0, > ITD_ATTRS_SPACE_NONSECURE); > s->dma_as = pci_device_iommu_address_space(pdev); > @@ -280,6 +289,7 @@ static void iommu_testdev_reset(DeviceState *dev) > s->dma_paddr = 0; > s->dma_len = 0; > s->dma_result = ITD_DMA_RESULT_IDLE; > + s->dma_write_val = ITD_DMA_WRITE_VAL; > s->dma_armed = false; > s->dma_attrs_cfg = ITD_ATTRS_SET_SPACE(0, > ITD_ATTRS_SPACE_NONSECURE); > } > diff --git a/include/hw/misc/iommu-testdev.h b/include/hw/misc/iommu- > testdev.h > index 3383659..2f4e931 100644 > --- a/include/hw/misc/iommu-testdev.h > +++ b/include/hw/misc/iommu-testdev.h > @@ -81,6 +81,7 @@ enum { > ITD_REG_DMA_ATTRS = 0x18, > ITD_REG_DMA_GPA_LO = 0x1c, > ITD_REG_DMA_GPA_HI = 0x20, > + ITD_REG_DMA_WRITE_VAL = 0x24, > BAR0_SIZE = 0x1000, > }; >
