On Sat, 8 Aug 2026 at 12:02, WX Chen <[email protected]> wrote: > > This series adds a QEMU model for the K230 SoC DesignWare 8250-compatible > UART controller, wires it into the K230 SoC, and adds qtest coverage. > > The implementation supports the registers and features required by the > Linux 8250_dw driver, providing an interactive shell over the serial port.
This is a model for the same hardware as this patch: https://lore.kernel.org/qemu-riscv/[email protected]/ I'm not fussed which one we end up with in the tree, but it would be good to name it generically so other machines can use it. Cheers, Joel > > Signed-off-by: WX Chen <[email protected]> > --- > Changes in v3: > - Removed all hardwired preprocessor #if conditionals from the logic > - Added a helper for the receiver line status interrupt check > - Encapsulated CPR and UCV register values in header macros > - Replaced g_usleep() with qtest_clock_step() in the qtest > - Link to v2: > https://lore.kernel.org/qemu-devel/[email protected] > > --- > WX Chen (3): > hw/char: add K230 DW 8250-compatible UART > hw/riscv: k230: connect DW 8250 UART > tests/qtest: add K230 UART test > > hw/char/Kconfig | 3 + > hw/char/k230_uart.c | 816 > +++++++++++++++++++++++++++++++++++++++++++ > hw/char/meson.build | 1 + > hw/riscv/k230.c | 33 +- > include/hw/char/k230_uart.h | 198 +++++++++++ > include/hw/riscv/k230.h | 6 +- > tests/qtest/k230-uart-test.c | 514 +++++++++++++++++++++++++++ > tests/qtest/meson.build | 2 +- > 8 files changed, 1559 insertions(+), 14 deletions(-) > --- > base-commit: 30e8a06b64aa58a3990ba39cb5d09531e7d265e0 > change-id: 20260808-feat-k230-uart-v3-0ff3651d70ef > > Best regards, > -- > WX Chen <[email protected]> > >
