On 8/20/26 10:12, Jamin Lin wrote:
Introduce the ASPEED_DEV_ACRY enum slot and add the ACRY model state
to AspeedSoCState.

Instantiate the new ACRY model on the AST2600 SoC using its
real-silicon register address and IRQ:

- ACRY register region 0x1e6fa000-0x1e6fafff
- IRQ 160

Signed-off-by: Jamin Lin <[email protected]>
---
  include/hw/arm/aspeed_soc.h |  3 +++
  hw/arm/aspeed_ast2600.c     | 17 +++++++++++++++++
  2 files changed, 20 insertions(+)

diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h
index 46e7854727..8d80f16705 100644
--- a/include/hw/arm/aspeed_soc.h
+++ b/include/hw/arm/aspeed_soc.h
@@ -25,6 +25,7 @@
  #include "hw/i2c/aspeed_i2c.h"
  #include "hw/i3c/aspeed_i3c.h"
  #include "hw/ssi/aspeed_smc.h"
+#include "hw/misc/aspeed_acry.h"
  #include "hw/misc/aspeed_hace.h"
  #include "hw/misc/aspeed_sbc.h"
  #include "hw/misc/aspeed_sli.h"
@@ -82,6 +83,7 @@ struct AspeedSoCState {
      AspeedSCUState scu;
      AspeedSCUState scuio;
      AspeedHACEState hace;
+    AspeedACRYState acry;
      AspeedXDMAState xdma;
      AspeedADCState adc;
      AspeedSMCState fmc;
@@ -271,6 +273,7 @@ enum {
      ASPEED_DEV_EMMC,
      ASPEED_DEV_KCS,
      ASPEED_DEV_HACE,
+    ASPEED_DEV_ACRY,
      ASPEED_DEV_DPMCU,
      ASPEED_DEV_DP,
      ASPEED_DEV_I3C,
diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c
index f23a51c8a4..f7c7ec7fb1 100644
--- a/hw/arm/aspeed_ast2600.c
+++ b/hw/arm/aspeed_ast2600.c
@@ -52,6 +52,7 @@ static const hwaddr aspeed_soc_ast2600_memmap[] = {
      [ASPEED_DEV_DP]        = 0x1E6EB000,
      [ASPEED_DEV_PCIE_PHY1] = 0x1E6ED200,
      [ASPEED_DEV_SBC]       = 0x1E6F2000,
+    [ASPEED_DEV_ACRY]      = 0x1E6FA000,
      [ASPEED_DEV_EMMC_BC]   = 0x1E6f5000,
      [ASPEED_DEV_VIDEO]     = 0x1E700000,
      [ASPEED_DEV_SDHCI]     = 0x1E740000,
@@ -144,6 +145,7 @@ static const int aspeed_soc_ast2600_irqmap[] = {
      [ASPEED_DEV_FSI1]      = 100,
      [ASPEED_DEV_FSI2]      = 101,
      [ASPEED_DEV_I3C]       = 102,   /* 102 -> 107 */
+    [ASPEED_DEV_ACRY]      = 160,
  };
static qemu_irq aspeed_soc_ast2600_get_irq(AspeedSoCState *s, int dev)
@@ -269,6 +271,8 @@ static void aspeed_soc_ast2600_init(Object *obj)
      snprintf(typename, sizeof(typename), "aspeed.hace-%s", socname);
      object_initialize_child(obj, "hace", &s->hace, typename);
+ object_initialize_child(obj, "acry", &s->acry, TYPE_ASPEED_ACRY);
+
      object_initialize_child(obj, "i3c", &s->i3c, TYPE_ASPEED_I3C);
object_initialize_child(obj, "sbc", &s->sbc, TYPE_ASPEED_AST2600_SBC);
@@ -726,6 +730,19 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, 
Error **errp)
      sysbus_connect_irq(SYS_BUS_DEVICE(&s->hace), 0,
                         aspeed_soc_ast2600_get_irq(s, ASPEED_DEV_HACE));
+ /* ACRY */
+    object_property_set_link(OBJECT(&s->acry), "dram", OBJECT(s->dram_mr),
+                             &error_abort);
+    object_property_set_link(OBJECT(&s->acry), "sram", OBJECT(&s->sram[1]),
+                             &error_abort);
+    if (!sysbus_realize(SYS_BUS_DEVICE(&s->acry), errp)) {
+        return;
+    }
+    aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->acry), 0,
+                    sc->memmap[ASPEED_DEV_ACRY]);
+    sysbus_connect_irq(SYS_BUS_DEVICE(&s->acry), 0,
+                       aspeed_soc_ast2600_get_irq(s, ASPEED_DEV_ACRY));
+
      /* I3C */
      if (!sysbus_realize(SYS_BUS_DEVICE(&s->i3c), errp)) {
          return;

Reviewed-by: Cédric Le Goater <[email protected]>

Thanks,

C.


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