On 8/13/2026 9:25 AM, Tao Tang wrote: > Enhance the page table walker to correctly handle secure and non-secure > memory accesses. This change introduces logic to select the appropriate > address space and enforce architectural security policies during walks. > > The page table walker now correctly processes Secure Stage 1 > translations. Key changes include: > > - The get_pte() function now uses the effective security state to fetch > page-table entries from either the Secure or Non-secure address space, > with explicit transaction attributes matching that address space. > > - The stage 1 walker tracks the security state, respecting the NSCFG > and NSTable attributes. It correctly handles the hierarchical security > model: if a table descriptor in a secure walk has NSTable=1, all > subsequent lookups for that walk are forced into the Non-secure space. > This is a one-way transition, as specified by the architecture. > > - The final TLB entry is tagged with the correct output address space, > ensuring proper memory isolation. > > Note: We do not yet support secure stage 2 translations. This patch > only implements Secure stage 1 page-table walks. Baseline propagation > of the incoming NS attribute for stage 1 bypass is handled separately > in this series with ATTR_PERMS_OVR == 0. Full ATTR_PERMS_OVR support > is left for a separate series. > > Signed-off-by: Tao Tang <[email protected]> > --- > hw/arm/smmu-common.c | 73 +++++++++++++++++++++++++++++------- > hw/arm/smmuv3.c | 19 ++++++---- > include/hw/arm/smmu-common.h | 7 ++-- > 3 files changed, 74 insertions(+), 25 deletions(-) >
Reviewed-by: Pierrick Bouvier <[email protected]>
