On 8/23/26 22:46, [email protected] wrote:
From: Alistair Francis<[email protected]>
The following changes since commit eea8fe61b8be8f3016e522e6af24924a0266ca95:
Merge tag 'igvm-20260821-pull-request' ofhttps://gitlab.com/kraxel/qemu into
staging (2026-08-21 10:39:31 -0700)
are available in the Git repository at:
https://github.com/alistair23/qemu.git tags/pull-riscv-to-apply-20260824-1
for you to fetch changes up to 85d38315fd19cda7fcfec5350f27cdfa15742600:
target/riscv/tcg: sret in virtual user mode raises virtual instruction
exception (2026-08-24 13:01:48 +1000)
----------------------------------------------------------------
RISC-V PR for 11.1
* Fix IMSIC CSR write and add tests
* Parametrise debug trigger number
* Add 'svbare' satp-mode
* Fix RINTC PLIC context ID for KVM
* Avoid abort when reading vtype before env->xl is set
* Skip reset for KVM irqchip
* Skip FP/Vector sync on KVM_PUT_RUNTIME_STATE
* More FDT cleanups (PLIC)
* Make FCTL.BE in IOMMU read only 0
* Check DC.TC reserved bits in IOMMU
* Apply UXL WARL handling to vsstatus
* Set cmd_ill IOFENCE.C if rsvp bits are set in IOMMU
* Set RISCV_IOMMU_FQ_HDR_PV appropriately
* Report QEMU CPU archid as 42
* Check PMP before updating PTE
* Add the Tenstorrent Atlantis machine
Applied, thanks. Please update https://wiki.qemu.org/ChangeLog/11.2 as
appropriate.
r~
