Hi Jack, Thanks for reviewing the changes.
On Thu, Aug 20, 2026 at 5:05 AM Jack Wang <[email protected]> wrote: > Hi,jankovic,I read datasheet of Allwinner and confirm basic address and > most function do well. But there are still some place needing improvement. > > > +static inline bool gpio_is_output(AWPortMap *port, uint32_t pin) > > +{ > > + uint32_t cfg_n = pin / CFG_PINS_PER_REG; > > + uint32_t pin_shift = (pin % CFG_PINS_PER_REG) * CFG_PIN_STRIDE; > > + return (extract32(port->cfg[cfg_n], pin_shift, CFG_PIN_STRIDE - 1) > == > > + CFG_OUTPUT_MASK); > > +} > > + > > +static inline bool gpio_is_input(AWPortMap *port, uint32_t pin) > > +{ > > + uint32_t cfg_n = pin / CFG_PINS_PER_REG; > > + uint32_t pin_shift = (pin % CFG_PINS_PER_REG) * CFG_PIN_STRIDE; > > + return (extract32(port->cfg[cfg_n], pin_shift, CFG_PIN_STRIDE - 1) > == > > + CFG_INPUT_MASK); > > +} > > + > > +static inline int int_ctl_cfg(AWGPIOState *s, int irq_line) > > +{ > > + unsigned int_cfg_n = s->regs[REG_INDEX(GPIO_INT_CFG0) + irq_line / > 8]; > > + return extract32(int_cfg_n, > > + (irq_line % INT_CFG_IRQ_PER_REG) * > INT_CFG_IRQ_STRIDE, > > + INT_CFG_IRQ_STRIDE - 1); > > +} > > + > there you use 'INT_CFG_IRQ_STRIDE - 1’ as stride for both two function。For > int_ctl_cfg the stride is supposed to be 4 > https://linux-sunxi.org/images/1/1e/Allwinner_A10_User_manual_V1.5.pdf in > page 333 you can find it, now all qtest pass because double edge do not be > designed in qtest（better add this test）. But for input and output function > it is right due to byte 3 is reserved. > The stride is set to 4 bits, but I am using only 3 bits when extracting the value for specific interrupt pin configuration, since the maximum non-reserved value that can be configured is 4 (for double edge). I will add the double edge test as well in the v2 patches. Best regards, Strahinja Jankovic > > Jack Wang >
