Introduce the names and allow them with the virt and sbsa-ref machine types. So far, the cpu types both exactly match "max".
Signed-off-by: Richard Henderson <[email protected]> --- hw/arm/sbsa-ref.c | 2 ++ hw/arm/virt.c | 2 ++ target/arm/tcg/cpu32.c | 4 ++++ target/arm/tcg/cpu64.c | 2 ++ 4 files changed, 10 insertions(+) diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c index 484b90053e8..56d08f605c8 100644 --- a/hw/arm/sbsa-ref.c +++ b/hw/arm/sbsa-ref.c @@ -913,6 +913,8 @@ static void sbsa_ref_class_init(ObjectClass *oc, const void *data) ARM_CPU_TYPE_NAME("neoverse-v1"), ARM_CPU_TYPE_NAME("neoverse-n2"), ARM_CPU_TYPE_NAME("max"), + ARM_CPU_TYPE_NAME("max-v8"), + ARM_CPU_TYPE_NAME("max-v9"), NULL, }; diff --git a/hw/arm/virt.c b/hw/arm/virt.c index e7a56e37f73..d738b95c726 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -4132,6 +4132,7 @@ static GPtrArray *virt_get_valid_cpu_types(const MachineState *ms) if (tcg_enabled()) { g_ptr_array_add(vct, g_strdup(ARM_CPU_TYPE_NAME("cortex-a7"))); g_ptr_array_add(vct, g_strdup(ARM_CPU_TYPE_NAME("cortex-a15"))); + g_ptr_array_add(vct, g_strdup(ARM_CPU_TYPE_NAME("max-v8"))); } if (tcg_enabled() && target_aarch64()) { g_ptr_array_add(vct, g_strdup(ARM_CPU_TYPE_NAME("cortex-a35"))); @@ -4143,6 +4144,7 @@ static GPtrArray *virt_get_valid_cpu_types(const MachineState *ms) g_ptr_array_add(vct, g_strdup(ARM_CPU_TYPE_NAME("neoverse-n1"))); g_ptr_array_add(vct, g_strdup(ARM_CPU_TYPE_NAME("neoverse-v1"))); g_ptr_array_add(vct, g_strdup(ARM_CPU_TYPE_NAME("neoverse-n2"))); + g_ptr_array_add(vct, g_strdup(ARM_CPU_TYPE_NAME("max-v9"))); } if (target_aarch64()) { g_ptr_array_add(vct, g_strdup(ARM_CPU_TYPE_NAME("cortex-a53"))); diff --git a/target/arm/tcg/cpu32.c b/target/arm/tcg/cpu32.c index 8397f26a864..12e70ded9c1 100644 --- a/target/arm/tcg/cpu32.c +++ b/target/arm/tcg/cpu32.c @@ -744,6 +744,10 @@ static const ARMCPUInfo arm_tcg_cpus[] = { { .name = "ti925t", .initfn = ti925t_initfn }, { .name = "sa1100", .initfn = sa1100_initfn }, { .name = "sa1110", .initfn = sa1110_initfn }, +#ifndef TARGET_AARCH64 + /* For aarch64, max-v8 is defined in cpu64.c */ + { .name = "max-v8", .initfn = aarch32_max_v8_tcg_initfn }, +#endif }; static void arm_tcg_cpu_register_types(void) diff --git a/target/arm/tcg/cpu64.c b/target/arm/tcg/cpu64.c index b38c61ba623..4f5375deb25 100644 --- a/target/arm/tcg/cpu64.c +++ b/target/arm/tcg/cpu64.c @@ -1488,6 +1488,8 @@ static const ARMCPUInfo aarch64_cpus[] = { { .name = "neoverse-n1", .initfn = aarch64_neoverse_n1_initfn }, { .name = "neoverse-v1", .initfn = aarch64_neoverse_v1_initfn }, { .name = "neoverse-n2", .initfn = aarch64_neoverse_n2_initfn }, + { .name = "max-v8", .initfn = aarch64_max_tcg_initfn }, + { .name = "max-v9", .initfn = aarch64_max_tcg_initfn }, }; static void aarch64_cpu_register_types(void) -- 2.53.0
