"Move" the ifdef to meson.build rules.
Signed-off-by: Richard Henderson <[email protected]>
---
target/arm/tcg/cpu32.c | 5 -----
target/arm/tcg/meson.build | 10 +++++-----
2 files changed, 5 insertions(+), 10 deletions(-)
diff --git a/target/arm/tcg/cpu32.c b/target/arm/tcg/cpu32.c
index 34436ad6ec4..2d642ef8787 100644
--- a/target/arm/tcg/cpu32.c
+++ b/target/arm/tcg/cpu32.c
@@ -19,9 +19,6 @@
#include "cpregs.h"
-/* CPU models. These are not needed for the AArch64 linux-user build. */
-#if !defined(CONFIG_USER_ONLY) || !defined(TARGET_AARCH64)
-
static void arm926_initfn(Object *obj)
{
ARMCPU *cpu = ARM_CPU(obj);
@@ -756,5 +753,3 @@ static void arm_tcg_cpu_register_types(void)
}
type_init(arm_tcg_cpu_register_types)
-
-#endif /* !CONFIG_USER_ONLY || !TARGET_AARCH64 */
diff --git a/target/arm/tcg/meson.build b/target/arm/tcg/meson.build
index 35e70b004d9..a3e9d55e853 100644
--- a/target/arm/tcg/meson.build
+++ b/target/arm/tcg/meson.build
@@ -30,10 +30,6 @@ translate32_d = [
arm_ss.add(when: 'TARGET_AARCH64', if_true: gen_a64)
arm_stubs_ss.add(files('stubs32.c'))
-arm_ss.add(files(
- 'cpu32.c',
-))
-
arm_ss.add(when: 'TARGET_AARCH64', if_true: files(
'gengvec64.c',
'translate-a64.c',
@@ -49,7 +45,10 @@ arm_ss.add(when: 'TARGET_AARCH64', if_true: files(
))
arm_common_system_ss.add(when: 'CONFIG_ARM_V7M', if_true: files('cpu-v7m.c'))
-arm_user_ss.add(when: 'TARGET_AARCH64', if_false: files('cpu-v7m.c'))
+arm_user_ss.add(when: 'TARGET_AARCH64', if_false: files(
+ 'cpu-v7m.c',
+ 'cpu32.c',
+))
arm_common_ss.add(zlib)
arm_common_ss.add(files(
@@ -86,6 +85,7 @@ arm_common_user_system_ss.add(when: 'TARGET_AARCH64',
if_true: files(
))
arm_common_system_ss.add(files(
+ 'cpu32.c',
'cpregs-at.c',
'gicv5-cpuif.c',
'psci.c',
--
2.53.0
