On 9/1/2026 10:33 AM, Brian Cain wrote: > Interrupts 3 through 5 are routed to guest mode when CCR:GIE and the > matching CCR:VV bit are set. Enter through GEVB rather than EVB, > record the pre-entry state in GSR and the return address in GELR, and > read the vector ID from the l2vic. > > Signed-off-by: Brian Cain <[email protected]> > --- > target/hexagon/reg_fields_def.h.inc | 7 +++ > target/hexagon/cpu.c | 5 ++ > target/hexagon/hex_interrupts.c | 91 ++++++++++++++++++++++++++--- > 3 files changed, 96 insertions(+), 7 deletions(-) >
Reviewed-by: Pierrick Bouvier <[email protected]>
