On Wed, Aug 26, 2026 at 04:48:37PM +0800, Ewan Hai-oc wrote: > Date: Wed, 26 Aug 2026 16:48:37 +0800 > From: Ewan Hai-oc <[email protected]> > Subject: [PATCH v4 3/4] target/i386: Introduce Zhaoxin Shijidadao CPU model > X-Mailer: git-send-email 2.34.1 > > Introduce the Zhaoxin Shijidadao CPU model with two versions: > > - v1 (alias: Shijidadao-Server) - Server variant with CORE_CAPABILITY > and SPLIT_LOCK_DETECT support > - v2 (alias: Shijidadao-Client) - Client variant with different FMS > (model=0x6b, stepping=1), with neither CORE_CAPABILITY features nor > the ACE2 feature pair > > Both versions include the SM2, CCS, RNG2, PHE2 and RSA feature pairs > exposed by KVM. > > The model_id for both variants is 'Zhaoxin Shijidadao Processor'. > > Signed-off-by: Ewan Hai <[email protected]> > --- > target/i386/cpu.c | 153 ++++++++++++++++++++++++++++++++++++++++++++++ > 1 file changed, 153 insertions(+)
Reviewed-by: Zhao Liu <[email protected]>
