Hello,
However, the OTP configuration can also be programmed at runtime.
Therefore, reading the OTP configuration only once at realize/reset time
may leave the SBC STATUS register out of sync if the OTP
configuration is changed afterward.
I see two possible approaches to keep the SBC STATUS register
synchronized with the OTP configuration:
Update the SBC STATUS register at reset and whenever the relevant
OTP configuration is programmed. This would keep the cached STATUS
value synchronized with the latest OTP configuration.
Caching values is always a problem. Unless performance is impacted,
computing is better.
Derive the relevant SBC STATUS bits directly from the OTP
configuration whenever the STATUS register is read. This avoids
maintaining a cached copy of the OTP-derived state.
yes something like :
static uint32_t aspeed_otp_read_cfg0(AspeedSBCState *s)
{
@@ -110,6 +111,23 @@ static uint64_t aspeed_sbc_read(void *op
}
switch (addr) {
+ case R_STATUS: {
+ uint32_t val = s->regs[R_STATUS];
+
+ if (aspeed_get_abr_state(s)) {
+ val |= ABR_EN;
+ } else {
+ val &= ~ABR_EN;
+ }
is better IMO. The SBC status register is a reflection of the OTP
fuse state. You could ask he HW designers for info on how the state
is maintained.
Thanks,
C.
