On Fri, Sep 4, 2026 at 12:28 AM Pierrick Bouvier <
[email protected]> wrote:
>
> On 9/3/2026 3:33 AM, Yonggang Luo wrote:
> >
> >
> >>
> >> > Pierrick Bouvier (14):
> >> > qom/object: add is_available callback to TypeInfo
> >>
> >
> > Patches for is_available callback to TypeInfo, it's can be merged latter
> >
>
> It's needed because files in patch 2 already depend on existing
> filtering mechanism to distinguish between arm and aarch64.
> We found other places where such filter could be used to specify target
> related types within a single C file, thus allowing to remove #ifdef
> TARGET_X easily.
>
> > The reason is for the following command to execute:
> >
> > we need add target_info_select and pass TargetInfo to is_available
> >
> > - Move target_info() into qom/object.c. Default to SYS_EMU_TARGET_NONE
> > until a real target is selected.
> > - Add target_info_select(); it may be called only once with a non-NULL
> > TargetInfo that is not SYS_EMU_TARGET_NONE.
> > - Invoke TypeInfo.is_available after select, passing target_info().
> > - Change target_* helpers to take const TargetInfo *.
>
> We can wait to have a need for this. As long as there is no
> heterogeneous support, it's safe to assume there is a single target
> active globally.
Because we would have more and more usage of target_* , that's why I would
suggest merge it as early as possible. I means directly usage of these
functions.
Not use is_avaible, for example:
--- a/hw/arm/aspeed_ast27x0.c
+++ b/hw/arm/aspeed_ast27x0.c
@@ -420,7 +420,7 @@ static void aspeed_soc_ast2700_init(Object *obj)
}
for (i = 0; i < sc->num_cpus; i++) {
- if (qtest_enabled() && !target_aarch64()) {
+ if (qtest_enabled() && !target_aarch64(target_info())) {
/*
* Introspection qtest just want to create this object
* without realizing it. ARM_CPU_TYPE_NAME("cortex-a35")
@@ -703,7 +703,7 @@ static void aspeed_soc_ast2700_realize(DeviceState
*dev, Error **errp)
qemu_irq irq;
int uart;
- if (qtest_enabled() && !target_aarch64()) {
+ if (qtest_enabled() && !target_aarch64(target_info())) {
g_assert_not_reached();
}
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 0871a35e11f..dbdf55dfea9 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -4132,7 +4132,7 @@ static GPtrArray *virt_get_valid_cpu_types(const
MachineState *ms)
g_ptr_array_add(vct, g_strdup(ARM_CPU_TYPE_NAME("cortex-a15")));
g_ptr_array_add(vct, g_strdup(ARM_CPU_TYPE_NAME("max-v8")));
}
- if (tcg_enabled() && target_aarch64()) {
+ if (tcg_enabled() && target_aarch64(target_info())) {
g_ptr_array_add(vct, g_strdup(ARM_CPU_TYPE_NAME("cortex-a35")));
g_ptr_array_add(vct, g_strdup(ARM_CPU_TYPE_NAME("cortex-a55")));
g_ptr_array_add(vct, g_strdup(ARM_CPU_TYPE_NAME("cortex-a72")));
@@ -4144,7 +4144,7 @@ static GPtrArray *virt_get_valid_cpu_types(const
MachineState *ms)
g_ptr_array_add(vct, g_strdup(ARM_CPU_TYPE_NAME("neoverse-n2")));
g_ptr_array_add(vct, g_strdup(ARM_CPU_TYPE_NAME("max-v9")));
}
- if (target_aarch64()) {
+ if (target_aarch64(target_info())) {
g_ptr_array_add(vct, g_strdup(ARM_CPU_TYPE_NAME("cortex-a53")));
g_ptr_array_add(vct, g_strdup(ARM_CPU_TYPE_NAME("cortex-a57")));
if (kvm_enabled() || hvf_enabled() || whpx_enabled()) {
diff --git a/hw/nitro/machine.c b/hw/nitro/machine.c
index 88d01960a01..2a924cab4f7 100644
--- a/hw/nitro/machine.c
+++ b/hw/nitro/machine.c
@@ -97,7 +97,7 @@ static char *build_eif(const char *kernel_data, gsize
kernel_size,
hdr = (EifHeader) {
.magic = EIF_MAGIC,
.version = cpu_to_be16(4),
- .flags = cpu_to_be16(target_aarch64() ? EIF_HDR_ARCH_ARM64 : 0),
+ .flags = cpu_to_be16(target_aarch64(target_info()) ?
EIF_HDR_ARCH_ARM64 : 0),
};
g_byte_array_append(buf, (const uint8_t *)&hdr, sizeof(hdr));
diff --git a/hw/pci/pci.c b/hw/pci/pci.c
index c15f2b9f084..26003f2b4df 100644
--- a/hw/pci/pci.c
+++ b/hw/pci/pci.c
@@ -2888,7 +2888,7 @@ void pci_qdev_property_add_specifics(DeviceClass *dc)
ObjectClass *oc = OBJECT_CLASS(dc);
/* The loadparm property is only supported on s390x */
- if (target_s390x()) {
+ if (target_s390x(target_info())) {
object_class_property_add_str(oc, "loadparm",
pci_qdev_property_get_loadparm,
pci_qdev_property_set_loadparm);
diff --git a/hw/scsi/scsi-disk.c b/hw/scsi/scsi-disk.c
index a42f7d8e77d..31170e87a33 100644
--- a/hw/scsi/scsi-disk.c
+++ b/hw/scsi/scsi-disk.c
@@ -3190,7 +3190,7 @@ static void scsi_property_add_specifics(DeviceClass
*dc)
ObjectClass *oc = OBJECT_CLASS(dc);
/* The loadparm property is only supported on s390x */
- if (target_s390x()) {
+ if (target_s390x(target_info())) {
object_class_property_add_str(oc, "loadparm",
scsi_property_get_loadparm,
scsi_property_set_loadparm);
diff --git a/hw/vfio/migration-multifd.c b/hw/vfio/migration-multifd.c
index a06cbf3c646..3d747b470cc 100644
--- a/hw/vfio/migration-multifd.c
+++ b/hw/vfio/migration-multifd.c
@@ -54,7 +54,7 @@ bool vfio_load_config_after_iter(VFIODevice *vbasedev)
* See commit d329f5032e17 ("vfio: Move the saving of the config space
to
* the right place in VFIO migration").
*/
- return target_base_arm();
+ return target_base_arm(target_info());
}
/* type safety */
diff --git a/hw/virtio/vhost-user.c b/hw/virtio/vhost-user.c
index 2881cec72d9..3383af64859 100644
--- a/hw/virtio/vhost-user.c
+++ b/hw/virtio/vhost-user.c
@@ -2631,7 +2631,7 @@ static int vhost_user_backend_init(struct vhost_dev
*dev, void *opaque,
return -EINVAL;
}
- const uint64_t vhost_user_max_ram_slots = target_base_ppc() ?
+ const uint64_t vhost_user_max_ram_slots =
target_base_ppc(target_info()) ?
SPAPR_MAX_RAM_SLOTS : VHOST_USER_MAX_RAM_SLOTS;
u->user->memory_slots = MIN(ram_slots,
vhost_user_max_ram_slots);
}
diff --git a/include/qemu/target-info-impl.h
b/include/qemu/target-info-impl.h
index cf42aabbc8b..61404baa4b5 100644
--- a/include/qemu/target-info-impl.h
any way, we can wait the following pull to be merged first
[PULL 00/51] Misc HW/accel patches for 2026-09-03
https://patchew.org/QEMU/[email protected]/
and a better way to deal with it would be appreciated.
I also have patches for riscv needs this.
--
此致
礼
罗勇刚
Yours
sincerely,
Yonggang Luo
