On Tue, Aug 25, 2026 at 4:43 PM Bin Meng <[email protected]> wrote: > > The GEM MMIO callbacks ignored the low address bits and access size. > Byte reads therefore always returned lane zero, causing guest driver > that reads the station address byte by byte to turn four unique MAC > addresses into the same value. Partial writes had the corresponding > lane-selection problem. > > Extract the requested little-endian read lane and merge partial writes > with the current register value. Preserve the existing read-clear, > write-clear, and command side effects, including dynamic queue > pointers. > > Fixes: e9f186e514a7 ("cadence_gem: initial version of device model") > Signed-off-by: Bin Meng <[email protected]> > > --- > > hw/net/cadence_gem.c | 94 ++++++++++++++++++++++++++++---------------- > 1 file changed, 60 insertions(+), 34 deletions(-) >
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