On Sun, Sep 6, 2026 at 5:44 AM Andrey Polivoda <[email protected]> wrote: > After running some tests, it looks like the behavior of (V)ROUNDSS, > (V)ROUNDSD, (V)MOVSS and (V)MOVSD is actually modified by this patch. > (MOVNTSS and MOVNTSD do not generate different TCG ops with and > without the patch applied. However, the VEX prefix > is actually illegal for these two AMD-specific instructions (tested on > AMD EPYC 7763; material for a different patch, I guess))
Thanks for checking that, I had no idea! > Also, VSQRTSS and VSQRTSD are actually raising an invalid opcode > exception when VEX.L is set > That's because: > 1. `vex_special` field of VSQRTSS/VSQRTSD opcode entries is set to > `X86_VEX_REPScalar` > 2. For entries with `vex_special == X86_VEX_REPScalar`, > `validate_vex()` raises the #UD > if `(s->prefix & (PREFIX_REPZ | PREFIX_REPNZ)) != 0` and `s->vex_l` is set > Intel Core i3-6100 and AMD EPYC 7763 do not raise #UD when this > happens. (looks like another patch material) Yeah, please check if this can be done in a single step. Maybe with a new vex_special X86_VEX_REPScalar_Unary or X86_VEX_REPScalar_LIG. Paolo
