On Thu, Sep 10, 2026 at 10:32 AM Brian Cain <[email protected]> wrote: > > SSR:XE gates access to the HVX coprocessor: executing an HVX instruction > while it is clear must raise a precise exception with cause 0x16, > NO_COPROC_ENABLE. > > Carry SSR:XE in a TB flag and emit the exception for the > first HVX packet of a TB when the coprocessor is disabled. > > Signed-off-by: Brian Cain <[email protected]> > --- > target/hexagon/cpu.h | 1 + > target/hexagon/translate.h | 2 ++ > target/hexagon/cpu.c | 2 ++ > target/hexagon/translate.c | 11 +++++++++++ > 4 files changed, 16 insertions(+)
> + hex_flags = FIELD_DP32(hex_flags, TB_FLAGS, HVX_COPROC_ENABLED, > + GET_SSR_FIELD(SSR_XE, env->t_sreg[HEX_SREG_SSR])); Is it safe to cache SSR.XE? What happens if a thread changes SSR.XE while executing the TB?
