On 9/11/26 10:43, Brian Cain wrote:
+typedef struct HexagonHVXContext {
+ MMVector VRegs[NUM_VREGS] QEMU_ALIGNED(16);
+ MMQReg QRegs[NUM_QREGS] QEMU_ALIGNED(16);
+} HexagonHVXContext;
Alignment is a property of the structure, here.
+#ifdef CONFIG_USER_ONLY
+ HexagonHVXContext hvx_ctx QEMU_ALIGNED(16);
+#else
No need to duplicate that here.
+static const TypeInfo hexagon_hvx_context_info = {
+ .name = TYPE_HEXAGON_HVX_CONTEXT,
+ .parent = TYPE_SYS_BUS_DEVICE,
+ .instance_size = sizeof(HexagonHVXContextState),
+ .class_init = hexagon_hvx_context_class_init,
+};
Missing .instance_align.
diff --git a/linux-user/hexagon/cpu_loop.c b/linux-user/hexagon/cpu_loop.c
index e4ef97a1184..c8fa6080a4e 100644
--- a/linux-user/hexagon/cpu_loop.c
+++ b/linux-user/hexagon/cpu_loop.c
@@ -33,6 +33,8 @@ void cpu_loop(CPUHexagonState *env)
target_ulong syscallnum;
target_ulong ret;
+ env->hvx = &HEXAGON_CPU(cs)->hvx_ctx;
How complex would it be to not have this pointer for user-only?
I think all that would be needed is to define the base as tcg_env and
adjust the offsetof used.
+ ctx->hvx_base = NULL;
+ if (ctx->pkt.pkt_has_hvx) {
+ ctx->hvx_base = tcg_temp_new_ptr();
+ tcg_gen_ld_ptr(ctx->hvx_base, tcg_env,
+ offsetof(CPUHexagonState, hvx));
+ }
I think you should use a TCG global for the env->hvx_ctx slot.
That will let the register allocator load the slot on demand.
Also, this could become
#ifdef CONFIG_USER_ONLY
#define hex_hvx_ptr tcg_env
#else
TCGv_ptr hex_hvx_ptr;
#endif
with a slight change in the offsetof computation.
r~
