Signed-off-by: Richard Henderson <[email protected]>
---
include/tcg/tcg-op-common.h | 7 ++--
include/tcg/tcg-op-def.h.inc | 1 +
tcg/tcg-op.c | 70 ++++++++++++++++--------------------
3 files changed, 34 insertions(+), 44 deletions(-)
diff --git a/include/tcg/tcg-op-common.h b/include/tcg/tcg-op-common.h
index ba208c0bca3..b674d4c3c65 100644
--- a/include/tcg/tcg-op-common.h
+++ b/include/tcg/tcg-op-common.h
@@ -100,6 +100,8 @@ void tcg_gen_plugin_mem_cb(TCGv_i64 addr, unsigned meminfo);
void glue(glue(tcg_gen_,NAME),TEXT)(T1, T2, T3);
#define DEF4(NAME, T1, T2, T3, T4) \
void glue(glue(tcg_gen_,NAME),TEXT)(T1, T2, T3, T4);
+#define DEF6(NAME, T1, T2, T3, T4, T5, T6) \
+ void glue(glue(tcg_gen_,NAME),TEXT)(T1, T2, T3, T4, T5, T6);
#define TCGV glue(TCGv,TEXT)
#define TEXT _i32
@@ -123,6 +125,7 @@ void tcg_gen_plugin_mem_cb(TCGv_i64 addr, unsigned meminfo);
#undef DEF2
#undef DEF3
#undef DEF4
+#undef DEF6
/* 32 bit ops */
@@ -146,8 +149,6 @@ void tcg_gen_sextract_i32(TCGv_i32 ret, TCGv_i32 arg,
unsigned int ofs, unsigned int len);
void tcg_gen_extract2_i32(TCGv_i32 ret, TCGv_i32 al, TCGv_i32 ah,
unsigned int ofs);
-void tcg_gen_movcond_i32(TCGCond cond, TCGv_i32 ret, TCGv_i32 c1,
- TCGv_i32 c2, TCGv_i32 v1, TCGv_i32 v2);
void tcg_gen_add2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 al,
TCGv_i32 ah, TCGv_i32 bl, TCGv_i32 bh);
void tcg_gen_sub2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 al,
@@ -209,8 +210,6 @@ void tcg_gen_sextract_i64(TCGv_i64 ret, TCGv_i64 arg,
unsigned int ofs, unsigned int len);
void tcg_gen_extract2_i64(TCGv_i64 ret, TCGv_i64 al, TCGv_i64 ah,
unsigned int ofs);
-void tcg_gen_movcond_i64(TCGCond cond, TCGv_i64 ret, TCGv_i64 c1,
- TCGv_i64 c2, TCGv_i64 v1, TCGv_i64 v2);
void tcg_gen_add2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 al,
TCGv_i64 ah, TCGv_i64 bl, TCGv_i64 bh);
void tcg_gen_sub2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 al,
diff --git a/include/tcg/tcg-op-def.h.inc b/include/tcg/tcg-op-def.h.inc
index a620c8ad69a..26583254111 100644
--- a/include/tcg/tcg-op-def.h.inc
+++ b/include/tcg/tcg-op-def.h.inc
@@ -13,6 +13,7 @@ DEF3(divu, TCGV, TCGV, TCGV)
DEF3(eqv, TCGV, TCGV, TCGV)
DEF2(mov, TCGV, TCGV)
DEF2(movi, TCGV, TINT)
+DEF6(movcond, TCGCond, TCGV, TCGV, TCGV, TCGV, TCGV)
DEF3(mul, TCGV, TCGV, TCGV)
DEF3(muli, TCGV, TCGV, TINT)
DEF3(nand, TCGV, TCGV, TCGV)
diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c
index 331a43b28d4..7f05dcf2c68 100644
--- a/tcg/tcg-op.c
+++ b/tcg/tcg-op.c
@@ -135,6 +135,14 @@ static TCGOp *gen_op_ttttt(TCGOpcode opc, TCGType type,
temp_arg(t3), temp_arg(t4));
}
+static TCGOp *gen_op_ttttti(TCGOpcode opc, TCGType type,
+ TCGTemp *t0, TCGTemp *t1, TCGTemp *t2,
+ TCGTemp *t3, TCGTemp *t4, TCGArg a5)
+{
+ return tcg_gen_op6(opc, type, temp_arg(t0), temp_arg(t1), temp_arg(t2),
+ temp_arg(t3), temp_arg(t4), a5);
+}
+
/*
* With CONFIG_DEBUG_TCG, tcgv_*_tmp via tcgv_*_arg, is an out-of-line
* assertion check. Force tail calls to avoid too much code expansion.
@@ -256,22 +264,6 @@ static void DNI tcg_gen_op5ii_i64(TCGOpcode opc, TCGv_i64
a1, TCGv_i64 a2,
tcgv_i64_arg(a3), a4, a5);
}
-static void DNI tcg_gen_op6i_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
- TCGv_i32 a3, TCGv_i32 a4,
- TCGv_i32 a5, TCGArg a6)
-{
- tcg_gen_op6(opc, TCG_TYPE_I32, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
- tcgv_i32_arg(a3), tcgv_i32_arg(a4), tcgv_i32_arg(a5), a6);
-}
-
-static void DNI tcg_gen_op6i_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
- TCGv_i64 a3, TCGv_i64 a4,
- TCGv_i64 a5, TCGArg a6)
-{
- tcg_gen_op6(opc, TCG_TYPE_I64, tcgv_i64_arg(a1), tcgv_i64_arg(a2),
- tcgv_i64_arg(a3), tcgv_i64_arg(a4), tcgv_i64_arg(a5), a6);
-}
-
/* Generic ops. */
void gen_set_label(TCGLabel *l)
@@ -334,6 +326,8 @@ void tcg_gen_plugin_mem_cb(TCGv_i64 addr, unsigned meminfo)
static void glue(gen_,NAME)(TCGType, T1, T2, T3);
#define DEF4(NAME, T1, T2, T3, T4) \
static void glue(gen_,NAME)(TCGType, T1, T2, T3, T4);
+#define DEF6(NAME, T1, T2, T3, T4, T5, T6) \
+ static void glue(gen_,NAME)(TCGType, T1, T2, T3, T4, T5, T6);
#define TCGV TCGTemp *
#define TINT int64_t
@@ -347,6 +341,7 @@ void tcg_gen_plugin_mem_cb(TCGv_i64 addr, unsigned meminfo)
#undef DEF2
#undef DEF3
#undef DEF4
+#undef DEF6
/*
* Templated operations.
@@ -369,6 +364,11 @@ void tcg_gen_plugin_mem_cb(TCGv_i64 addr, unsigned meminfo)
{ gen_##NAME(TYPE, glue(C_,T1)(a), glue(C_,T2)(b), \
glue(C_,T3)(c), glue(C_,T4)(d)); }
+#define DEF6(NAME, T1, T2, T3, T4, T5, T6) \
+ void glue(glue(tcg_gen_,NAME),TEXT)(T1 a, T2 b, T3 c, T4 d, T5 e, T6 f) \
+ { gen_##NAME(TYPE, glue(C_,T1)(a), glue(C_,T2)(b), glue(C_,T3)(c), \
+ glue(C_,T4)(d), glue(C_,T5)(e), glue(C_,T6)(f)); }
+
#define C_TCGv_i32 tcgv_i32_temp
#define C_TCGv_i64 tcgv_i64_temp
#define C_int32_t
@@ -408,6 +408,8 @@ void tcg_gen_plugin_mem_cb(TCGv_i64 addr, unsigned meminfo)
#undef DEF1
#undef DEF2
#undef DEF3
+#undef DEF4
+#undef DEF6
/*
* Generic expansions for templated operations.
@@ -547,6 +549,18 @@ static void gen_movi(TCGType type, TCGTemp *dst, int64_t
src)
gen_op_tt(INDEX_op_mov, type, dst, tcg_constant_internal(type, src));
}
+static void gen_movcond(TCGType type, TCGCond cond, TCGTemp *dst,
+ TCGTemp *c1, TCGTemp *c2, TCGTemp *v1, TCGTemp *v2)
+{
+ if (cond == TCG_COND_ALWAYS) {
+ gen_mov(type, dst, v1);
+ } else if (cond == TCG_COND_NEVER) {
+ gen_mov(type, dst, v2);
+ } else {
+ gen_op_ttttti(INDEX_op_movcond, type, dst, c1, c2, v1, v2, cond);
+ }
+}
+
static void gen_mul(TCGType type, TCGTemp *dst, TCGTemp *src1, TCGTemp *src2)
{
gen_op_ttt(INDEX_op_mul, type, dst, src1, src2);
@@ -1098,18 +1112,6 @@ void tcg_gen_extract2_i32(TCGv_i32 ret, TCGv_i32 al,
TCGv_i32 ah,
}
}
-void tcg_gen_movcond_i32(TCGCond cond, TCGv_i32 ret, TCGv_i32 c1,
- TCGv_i32 c2, TCGv_i32 v1, TCGv_i32 v2)
-{
- if (cond == TCG_COND_ALWAYS) {
- tcg_gen_mov_i32(ret, v1);
- } else if (cond == TCG_COND_NEVER) {
- tcg_gen_mov_i32(ret, v2);
- } else {
- tcg_gen_op6i_i32(INDEX_op_movcond, ret, c1, c2, v1, v2, cond);
- }
-}
-
void tcg_gen_add2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 al,
TCGv_i32 ah, TCGv_i32 bl, TCGv_i32 bh)
{
@@ -2023,18 +2025,6 @@ void tcg_gen_extract2_i64(TCGv_i64 ret, TCGv_i64 al,
TCGv_i64 ah,
}
}
-void tcg_gen_movcond_i64(TCGCond cond, TCGv_i64 ret, TCGv_i64 c1,
- TCGv_i64 c2, TCGv_i64 v1, TCGv_i64 v2)
-{
- if (cond == TCG_COND_ALWAYS) {
- tcg_gen_mov_i64(ret, v1);
- } else if (cond == TCG_COND_NEVER) {
- tcg_gen_mov_i64(ret, v2);
- } else {
- tcg_gen_op6i_i64(INDEX_op_movcond, ret, c1, c2, v1, v2, cond);
- }
-}
-
void tcg_gen_add2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 al,
TCGv_i64 ah, TCGv_i64 bl, TCGv_i64 bh)
{
--
2.53.0
