Default to 16GT/s x32 for new machine types and add compat entries for <= 11.1 to preserve the old 2.5GT/s x1 behavior.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/4409 Signed-off-by: Cédric Le Goater <[email protected]> --- hw/core/machine.c | 2 ++ hw/pci-bridge/xio3130_downstream.c | 5 +++++ 2 files changed, 7 insertions(+) diff --git a/hw/core/machine.c b/hw/core/machine.c index 8939ae16666c2d9454d93eccc5ca44e231b1ef6d..b702a61f7335a30841164279e73432bc238ee5e5 100644 --- a/hw/core/machine.c +++ b/hw/core/machine.c @@ -43,6 +43,8 @@ GlobalProperty hw_compat_11_1[] = { { "sysbus-ehci-usb", "x-migrate-fetch-addr-64bit", "off" }, { "pci-ehci-usb", "x-migrate-fetch-addr-64bit", "off" }, + { "xio3130-downstream", "x-speed", "2_5" }, + { "xio3130-downstream", "x-width", "1" }, }; const size_t hw_compat_11_1_len = G_N_ELEMENTS(hw_compat_11_1); diff --git a/hw/pci-bridge/xio3130_downstream.c b/hw/pci-bridge/xio3130_downstream.c index 0c3fed3053b0e2b2ee2cf703c5f9e1f33ec1ff5b..0669223159a43f334d7ed46bec347de1bb8420ca 100644 --- a/hw/pci-bridge/xio3130_downstream.c +++ b/hw/pci-bridge/xio3130_downstream.c @@ -25,6 +25,7 @@ #include "hw/pci/pcie.h" #include "hw/pci/pcie_port.h" #include "hw/core/qdev-properties.h" +#include "hw/core/qdev-properties-system.h" #include "migration/vmstate.h" #include "qapi/error.h" #include "qemu/module.h" @@ -137,6 +138,10 @@ static void xio3130_downstream_exitfn(PCIDevice *d) static const Property xio3130_downstream_props[] = { DEFINE_PROP_BIT(COMPAT_PROP_PCP, PCIDevice, cap_present, QEMU_PCIE_SLTCAP_PCP_BITNR, true), + DEFINE_PROP_PCIE_LINK_SPEED("x-speed", PCIESlot, + speed, PCIE_LINK_SPEED_16), + DEFINE_PROP_PCIE_LINK_WIDTH("x-width", PCIESlot, + width, PCIE_LINK_WIDTH_32), }; static const VMStateDescription vmstate_xio3130_downstream = { -- 2.55.0
