Instantiate the Axiado HCP and map its three MMIO regions - the EIP-197 packet engine, the SHIM MAC configuration block and the PCS/SerDes CSR region - at the addresses the SoC uses.
Its ten interrupt lines are connected to the GIC in the order the guest expects: one for the EIP-197 itself, four for the descriptor ring interfaces and five for the MACs. Signed-off-by: Ratan Lal Dondi <[email protected]> --- hw/arm/Kconfig | 1 + hw/arm/ax3000-soc.c | 23 +++++++++++++++++++++++ include/hw/arm/ax3000-soc.h | 14 ++++++++++++++ 3 files changed, 38 insertions(+) diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig index eae06369b0..5545f4846d 100644 --- a/hw/arm/Kconfig +++ b/hw/arm/Kconfig @@ -723,6 +723,7 @@ config AXIADO_SOC select AXIADO_CLK select CADENCE_GPIO select AXIADO_SDHCI + select AXIADO_HCP select UNIMP config AXIADO_EVK diff --git a/hw/arm/ax3000-soc.c b/hw/arm/ax3000-soc.c index ebe174fb97..9c3137af2a 100644 --- a/hw/arm/ax3000-soc.c +++ b/hw/arm/ax3000-soc.c @@ -41,6 +41,10 @@ static void ax3000_init(Object *obj) g_autofree char *name = g_strdup_printf("gpio%d", i); object_initialize_child(obj, name, &s->gpio[i], TYPE_CADENCE_GPIO); } + + + object_initialize_child(obj, "hcp", &s->hcp, TYPE_AXIADO_HCP); + } static void ax3000_realize(DeviceState *dev, Error **errp) @@ -49,6 +53,7 @@ static void ax3000_realize(DeviceState *dev, Error **errp) Ax3000SoCClass *sc = AX3000_SOC_GET_CLASS(s); SysBusDevice *gic_sbd = SYS_BUS_DEVICE(&s->gic); DeviceState *gic_dev = DEVICE(&s->gic); + SysBusDevice *hcp_sbd = SYS_BUS_DEVICE(&s->hcp); QList *redist_region_count; SysBusDevice *sdhci0_sbd; DeviceState *card; @@ -217,6 +222,24 @@ static void ax3000_realize(DeviceState *dev, Error **errp) sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpio[i]), 0, qdev_get_gpio_in(gic_dev, gpio_table[i].irq)); } + + /* HCP */ + if (!sysbus_realize(SYS_BUS_DEVICE(&s->hcp), errp)) { + return; + } + + sysbus_mmio_map(hcp_sbd, 0, AX3000_HCP_EIP197_BASE); + + sysbus_mmio_map(hcp_sbd, 1, AX3000_HCP_SHIM_BASE); + + sysbus_mmio_map(hcp_sbd, 2, AX3000_HCP_PHY_CSR_BASE); + + for (int i = 0; i < HCP_NUM_IRQS; i++) { + sysbus_connect_irq(hcp_sbd, i, + qdev_get_gpio_in(gic_dev, + AX3000_HCP_IRQ_BASE + i)); + } + } static void ax3000_class_init(ObjectClass *oc, const void *data) diff --git a/include/hw/arm/ax3000-soc.h b/include/hw/arm/ax3000-soc.h index 344fcb6f3c..187c1e02ad 100644 --- a/include/hw/arm/ax3000-soc.h +++ b/include/hw/arm/ax3000-soc.h @@ -15,6 +15,7 @@ #include "hw/misc/axiado_clk.h" #include "hw/gpio/cadence_gpio.h" #include "hw/sd/axiado_sdhci.h" +#include "hw/net/axiado_hcp.h" #include "hw/core/sysbus.h" #include "qemu/units.h" @@ -48,6 +49,10 @@ OBJECT_DECLARE_TYPE(Ax3000SoCState, Ax3000SoCClass, AX3000_SOC) #define AX3000_GPIO6_BASE 0x80800000 #define AX3000_GPIO7_BASE 0x80880000 +#define AX3000_HCP_EIP197_BASE 0x83000000 +#define AX3000_HCP_SHIM_BASE 0x83100000 +#define AX3000_HCP_PHY_CSR_BASE 0x87000000 + #define AX3000_TIMER_CTRL 0x8A020000 #define AX3000_PLL_BASE 0x80000000 @@ -69,6 +74,7 @@ typedef struct Ax3000SoCState { CadenceUARTState uart[AX3000_NUM_UARTS]; CadenceGPIOState gpio[AX3000_NUM_GPIOS]; AxiadoSDHCIState sdhci0; + AXIADOHCPState hcp; } Ax3000SoCState; typedef struct Ax3000SoCClass { @@ -93,6 +99,14 @@ enum Ax3000Irqs { AX3000_GPIO5_IRQ = 188, AX3000_GPIO6_IRQ = 189, AX3000_GPIO7_IRQ = 190, + + /* + * HCP IRQ base — 10 contiguous SPIs : + * +0 = EIP-197 global + * +1..+4 = ring interfaces (4) + * +5..+9 = MAC IRQs (5) + */ + AX3000_HCP_IRQ_BASE = 0, }; #endif /* AXIADO_AX3000_H */ -- 2.34.1
