[PATCH v2 06/16] target/mips: Use tcg_gen_lea() for [D]LSA and MXU S32LD*V opcodes

[Richard Henderson]

From: Philippe Mathieu-Daudé <phi...@oss.qualcomm.com>

Signed-off-by: Philippe Mathieu-Daudé <phi...@oss.qualcomm.com>
Reviewed-by: Richard Henderson <richard.hender...@linaro.org>
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Message-ID: <20260831062630.58771-1-phi...@oss.qualcomm.com>
---
 target/mips/tcg/mxu_translate.c        | 3 +--
 target/mips/tcg/translate_addr_const.c | 6 ++----
 2 files changed, 3 insertions(+), 6 deletions(-)

diff --git a/target/mips/tcg/mxu_translate.c b/target/mips/tcg/mxu_translate.c
index a38f4da12ba..5361c94b343 100644
--- a/target/mips/tcg/mxu_translate.c
+++ b/target/mips/tcg/mxu_translate.c
@@ -1596,8 +1596,7 @@ static void gen_mxu_s32ldxvx(DisasContext *ctx, bool 
reversed,
 
     gen_load_gpr(t0, Rb);
     gen_load_gpr(t1, Rc);
-    tcg_gen_shli_i32(t1, t1, strd2);
-    tcg_gen_add_i32(t0, t0, t1);
+    tcg_gen_lea_i32(t0, t0, t1, strd2, 0);
 
     tcg_gen_qemu_ld_i32(t1, t0, ctx->mem_idx,
                        MO_SL | mo_endian_rev(ctx, reversed) |
diff --git a/target/mips/tcg/translate_addr_const.c 
b/target/mips/tcg/translate_addr_const.c
index 1d140e918da..910177e43bc 100644
--- a/target/mips/tcg/translate_addr_const.c
+++ b/target/mips/tcg/translate_addr_const.c
@@ -26,8 +26,7 @@ bool gen_lsa(DisasContext *ctx, int rd, int rt, int rs, int 
sa)
     t1 = tcg_temp_new();
     gen_load_gpr(t0, rs);
     gen_load_gpr(t1, rt);
-    tcg_gen_shli_tl(t0, t0, sa);
-    tcg_gen_add_tl(cpu_gpr[rd], t0, t1);
+    tcg_gen_lea_tl(cpu_gpr[rd], t1, t0, sa, 0);
     tcg_gen_ext32s_tl(cpu_gpr[rd], cpu_gpr[rd]);
     return true;
 }
@@ -47,7 +46,6 @@ bool gen_dlsa(DisasContext *ctx, int rd, int rt, int rs, int 
sa)
     t1 = tcg_temp_new();
     gen_load_gpr(t0, rs);
     gen_load_gpr(t1, rt);
-    tcg_gen_shli_tl(t0, t0, sa);
-    tcg_gen_add_tl(cpu_gpr[rd], t0, t1);
+    tcg_gen_lea_tl(cpu_gpr[rd], t1, t0, sa, 0);
     return true;
 }
-- 
2.53.0