Add a KVM-only named CPU model for NVIDIA Grace, inheriting from neoverse-v2-v1. Because there is no public Grace TRM, this model is based on ID register dumps from actual Grace systems, which appear to implement Neoverse V2 r0p0 with the SoC crypto opt-ins enabled.
The extra properties are SM3/SM4, SHA1/SHA2/SHA3/PMULL, the matching SVE AES/SHA3/SM4 bits, and CTR_EL0.DIC. Final ID register state requested from KVM for "grace-v1": [ 0] AIDR_EL1 = 0x0000000000000000 [ 1] CLIDR_EL1 = 0x0000000000000000 [ 2] CTR_EL0 = 0x00000000b444c004 [ 3] DCZID_EL0 = 0x0000000000000004 [ 4] GMID_EL1 = 0x0000000000000000 [ 5] ID_AA64AFR0_EL1 = 0x0000000000000000 [ 6] ID_AA64AFR1_EL1 = 0x0000000000000000 [ 7] ID_AA64DFR0_EL1 = 0x000000f010305009 [ 8] ID_AA64DFR1_EL1 = 0x0000000000000000 [ 9] ID_AA64DFR2_EL1 = 0x0000000000000000 [ 10] ID_AA64FPFR0_EL1 = 0x0000000000000000 [ 11] ID_AA64ISAR0_EL1 = 0x0221111110212120 [ 12] ID_AA64ISAR1_EL1 = 0x0011111101211052 [ 13] ID_AA64ISAR2_EL1 = 0x0000000000000000 [ 14] ID_AA64ISAR3_EL1 = 0x0000000000000000 [ 15] ID_AA64MMFR0_EL1 = 0x0000011100101125 [ 16] ID_AA64MMFR1_EL1 = 0x0000000010312122 [ 17] ID_AA64MMFR2_EL1 = 0x1221011110001011 [ 18] ID_AA64MMFR3_EL1 = 0x0000000000000000 [ 19] ID_AA64MMFR4_EL1 = 0x0000000000000000 [ 20] ID_AA64PFR0_EL1 = 0x1101000120110011 [ 21] ID_AA64PFR1_EL1 = 0x0000000000000021 [ 22] ID_AA64PFR2_EL1 = 0x0000000000000000 [ 23] ID_AA64SMFR0_EL1 = 0x0000000000000000 [ 24] ID_AA64ZFR0_EL1 = 0x0000110100110021 [ 25] ID_AFR0_EL1 = 0x0000000000000000 [ 26] ID_DFR0_EL1 = 0x0000000000000000 [ 27] ID_DFR1_EL1 = 0x0000000000000000 [ 28] ID_ISAR0_EL1 = 0x0000000000000000 [ 29] ID_ISAR1_EL1 = 0x0000000000000000 [ 30] ID_ISAR2_EL1 = 0x0000000000000000 [ 31] ID_ISAR3_EL1 = 0x0000000000000000 [ 32] ID_ISAR4_EL1 = 0x0000000000000000 [ 33] ID_ISAR5_EL1 = 0x0000000000000000 [ 34] ID_ISAR6_EL1 = 0x0000000000000000 [ 35] ID_MMFR0_EL1 = 0x0000000000000000 [ 36] ID_MMFR1_EL1 = 0x0000000000000000 [ 37] ID_MMFR2_EL1 = 0x0000000000000000 [ 38] ID_MMFR3_EL1 = 0x0000000000000000 [ 39] ID_MMFR4_EL1 = 0x0000000000000000 [ 40] ID_MMFR5_EL1 = 0x0000000000000000 [ 41] ID_PFR0_EL1 = 0x0000000000000000 [ 42] ID_PFR1_EL1 = 0x0000000000000000 [ 43] ID_PFR2_EL1 = 0x0000000000000000 [ 44] MIDR_EL1 = 0x00000000410fd4f0 [ 45] MPIDR_EL1 = 0x0000000080000000 [ 46] MVFR0_EL1 = 0x0000000000000000 [ 47] MVFR1_EL1 = 0x0000000000000000 [ 48] MVFR2_EL1 = 0x0000000000000000 [ 49] REVIDR_EL1 = 0x0000000000000000 [ 50] SMIDR_EL1 = 0x0000000000000000 Signed-off-by: Khushit Shah <[email protected]> --- hw/arm/virt.c | 1 + target/arm/cpu-models.c | 23 +++++++++++++++++++++++ 2 files changed, 24 insertions(+) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index e514d167cd..d5ff7cf29d 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -4149,6 +4149,7 @@ static GPtrArray *virt_get_valid_cpu_types(const MachineState *ms) g_ptr_array_add(vct, g_strdup(ARM_CPU_TYPE_NAME("neoverse-v2-v1"))); g_ptr_array_add(vct, g_strdup(ARM_CPU_TYPE_NAME("neoverse-v2-v2"))); g_ptr_array_add(vct, g_strdup(ARM_CPU_TYPE_NAME("graviton4-v1"))); + g_ptr_array_add(vct, g_strdup(ARM_CPU_TYPE_NAME("grace-v1"))); } if (target_aarch64()) { g_ptr_array_add(vct, g_strdup(ARM_CPU_TYPE_NAME("cortex-a53"))); diff --git a/target/arm/cpu-models.c b/target/arm/cpu-models.c index 1a8913e619..4e92909755 100644 --- a/target/arm/cpu-models.c +++ b/target/arm/cpu-models.c @@ -18,6 +18,7 @@ * neoverse-v2-v1 (r0p0) * neoverse-v2-v2 (r0p1) * graviton4-v1 + * grace-v1 * SPDX-License-Identifier: GPL-2.0-or-later */ @@ -225,6 +226,27 @@ static const ArmModelPropValue neoverse_v2_v2_props[] = { MODEL_PROP_END, }; +/* Based on neoverse-v2-v1, with opt-in cryptographic features. */ +static const ArmModelPropValue grace_v1_props[] = { + /* ID_AA64ISAR0_EL1 */ + MODEL_PROP("SYSREG_ID_AA64ISAR0_EL1_SM4", NUM, 1), /* FEAT_SM4 */ + MODEL_PROP("SYSREG_ID_AA64ISAR0_EL1_SM3", NUM, 1), /* FEAT_SM3 */ + MODEL_PROP("SYSREG_ID_AA64ISAR0_EL1_SHA3", NUM, 1), /* FEAT_SHA3 */ + MODEL_PROP("SYSREG_ID_AA64ISAR0_EL1_SHA2", NUM, 2), /* FEAT_SHA256 */ + MODEL_PROP("SYSREG_ID_AA64ISAR0_EL1_SHA1", NUM, 1), /* FEAT_SHA1 */ + MODEL_PROP("SYSREG_ID_AA64ISAR0_EL1_AES", NUM, 2), /* FEAT_PMULL */ + + /* ID_AA64ZFR0_EL1 */ + MODEL_PROP("SYSREG_ID_AA64ZFR0_EL1_AES", NUM, 2), /* FEAT_SVE_PMULL128 */ + MODEL_PROP("SYSREG_ID_AA64ZFR0_EL1_SHA3", NUM, 1), /* FEAT_SVE_SHA3 */ + MODEL_PROP("SYSREG_ID_AA64ZFR0_EL1_SM4", NUM, 1), /* FEAT_SVE_SM4 */ + + /* CTR_EL0 */ + MODEL_PROP("SYSREG_CTR_EL0_DIC", NUM, 1), + + MODEL_PROP_END, +}; + /* Based on neoverse-v2-v2, with opt-in cryptographic features and RNDR. */ static const ArmModelPropValue graviton4_v1_props[] = { /* ID_AA64ISAR0_EL1 */ @@ -249,6 +271,7 @@ static const ArmNamedCpuModel arm_cpu_models[] = { {"neoverse-v2-v1", "arm-v9.0-a-v1", neoverse_v2_v1_props}, {"neoverse-v2-v2", "neoverse-v2-v1", neoverse_v2_v2_props}, {"graviton4-v1", "neoverse-v2-v2", graviton4_v1_props}, + {"grace-v1", "neoverse-v2-v1", grace_v1_props}, {NULL, NULL, NULL} }; -- 2.52.0
