Some i.MX SoCs have multiple i.MX network IP blocks which in QEMU use the LAN9118 Phy. Allow to distinguish them via their QOM path when tracing.
Signed-off-by: Bernhard Beschow <[email protected]> --- hw/net/lan9118_phy.c | 10 +++++----- hw/net/trace-events | 9 +++++---- 2 files changed, 10 insertions(+), 9 deletions(-) diff --git a/hw/net/lan9118_phy.c b/hw/net/lan9118_phy.c index 2fc027d112..ee87a51241 100644 --- a/hw/net/lan9118_phy.c +++ b/hw/net/lan9118_phy.c @@ -85,14 +85,14 @@ uint16_t lan9118_phy_read(Lan9118PhyState *s, int reg) break; } - trace_lan9118_phy_read(val, reg); + trace_lan9118_phy_read(DEVICE(s)->canonical_path, val, reg); return val; } void lan9118_phy_write(Lan9118PhyState *s, int reg, uint16_t val) { - trace_lan9118_phy_write(val, reg); + trace_lan9118_phy_write(DEVICE(s)->canonical_path, val, reg); switch (reg) { case MII_BMCR: @@ -138,11 +138,11 @@ void lan9118_phy_update_link(Lan9118PhyState *s, bool link_down) /* Autonegotiation status mirrors link status. */ if (link_down) { - trace_lan9118_phy_update_link("down"); + trace_lan9118_phy_link_down(DEVICE(s)->canonical_path); s->status &= ~(MII_BMSR_AN_COMP | MII_BMSR_LINK_ST); s->ints |= PHY_INT_DOWN; } else { - trace_lan9118_phy_update_link("up"); + trace_lan9118_phy_link_up(DEVICE(s)->canonical_path); s->status |= MII_BMSR_AN_COMP | MII_BMSR_LINK_ST; s->ints |= PHY_INT_ENERGYON; s->ints |= PHY_INT_AUTONEG_COMPLETE; @@ -152,7 +152,7 @@ void lan9118_phy_update_link(Lan9118PhyState *s, bool link_down) void lan9118_phy_reset(Lan9118PhyState *s) { - trace_lan9118_phy_reset(); + trace_lan9118_phy_reset(DEVICE(s)->canonical_path); s->control = MII_BMCR_AUTOEN | MII_BMCR_SPEED100; s->status = MII_BMSR_100TX_FD diff --git a/hw/net/trace-events b/hw/net/trace-events index 81af808044..839a612d35 100644 --- a/hw/net/trace-events +++ b/hw/net/trace-events @@ -11,10 +11,11 @@ allwinner_sun8i_emac_read(uint64_t offset, uint64_t val) "MMIO read: offset=0x%" allwinner_sun8i_emac_write(uint64_t offset, uint64_t val) "MMIO write: offset=0x%" PRIx64 " value=0x%" PRIx64 # lan9118_phy.c -lan9118_phy_read(uint16_t val, int reg) "[0x%02x] -> 0x%04" PRIx16 -lan9118_phy_write(uint16_t val, int reg) "[0x%02x] <- 0x%04" PRIx16 -lan9118_phy_update_link(const char *s) "%s" -lan9118_phy_reset(void) "" +lan9118_phy_read(const char *path, uint16_t val, int reg) "%s: [0x%02x] -> 0x%04" PRIx16 +lan9118_phy_write(const char *path, uint16_t val, int reg) "%s: [0x%02x] <- 0x%04" PRIx16 +lan9118_phy_link_down(const char *path) "%s" +lan9118_phy_link_up(const char *path) "%s" +lan9118_phy_reset(const char *path) "%s" # lance.c lance_mem_readw(uint64_t addr, uint32_t ret) "addr=0x%"PRIx64"val=0x%04x" -- 2.55.0
