On 21/9/26 07:46, Junjie Cao wrote:
epctx->interval is an unsigned int, so ~(epctx->interval - 1) is a
32-bit mask that is zero-extended when and-ed with the 64-bit microframe
index. Once mfindex no longer fits in 32 bits (2^32 * 125us, about 6.2
days after the controller was started), asap loses its upper half and
always compares below mfindex. Isoch TDs with SIA are then run at once
instead of at the next interval boundary. xhci_calc_intr_kick() has the
same expression.
Use ROUND_UP(), which builds the mask in the type of mfindex. The
interval is always a power of two.
The reporter of #3973 also saw the symptom with UHCI. This change does
not explain that.
Nice.
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Fixes: 3d1396842d ("xhci: iso xfer support")
Fixes: 4d7a81c06f ("xhci: emulate intr endpoint intervals correctly")
Link: https://gitlab.com/qemu-project/qemu/-/issues/3973
Cc: [email protected]
Signed-off-by: Junjie Cao <[email protected]>
---
hw/usb/hcd-xhci.c | 6 ++----
1 file changed, 2 insertions(+), 4 deletions(-)
