On Tue, Sep 8, 2026 at 6:42 PM Bin Meng <[email protected]> wrote:
>
>
> The Phytium E2000Q is a heterogeneous Armv8 SoC with two FTC664 cores
> and two FTC310 cores. This series adds a reusable E2000Q SoC QOM
> device which owns Cortex-A72 CPU children and applies the FTC core
> configuration locally. Two board machines embed the SoC:
>
>   - phytium-pi, with firmware and Linux on SD0
>   - phytium-e2000-come, with firmware in QSPI NOR and Linux on an
>     AHCI1 SATA disk
>
> The machines support the vendor firmware path from the on-chip
> Phytium Boot ROM (PBR) handoff through Processor Base Firmware (PBF),
> TF-A, OP-TEE, U-Boot, and Linux. They can also directly boot SDK Linux
> kernels when supplied with matching board device trees.
>
> The PBR model does not execute undocumented ROM code. It parses the
> selected fip-all.bin, validates the PBF, TF-A FIP, and platform
> parameter records, and reconstructs the observed handoff state. The
> MHU model handles the private SCMI power-domain requests needed to
> release secondary CPUs and exposes a separate Base-protocol channel
> to Linux.
>
> The E2000Q SoC provides GICv3/ITS, UARTs, GPEX PCIe, SMMUv3, four
> Cadence GEM controllers, two DesignWare-derived MCI controllers, QSPI,
> I2C, xHCI, AHCI, a random generator, and the firmware-facing DDR and
> control regions. Board machines retain RAM, firmware media, and
> storage backend attachment. Unimplemented register windows remain
> visible to firmware without claiming unsupported behavior.
>
> Functional tests exercise both firmware and direct Linux boot on the
> Phytium Pi with an SDK Buildroot image. Manual testing covers Phytium
> Pi SD boot, COMe QSPI-to-SATA boot, all four CPUs, and network access.
>
> Known limitations are documented. In particular, the PBR handoff is
> a behavioral model validated against the available SDK firmware
> samples.
>
> Changes in v2:
> - Use scripts/git.orderfile when generating the series
> - Configure FTC cores as SoC-owned Cortex-A72 CPU children
> - Keep Phytium CPU configuration out of the global ARM CPU list
> - Explain why the Phytium machines are restricted to TCG
> - Reduce the DesignWare MCI register migration state to 96 words
>
> Bin Meng (32):
>   hw/arm: Add Phytium E2000 SoC and Phytium Pi machine
>   hw/arm: phytium: Add Phytium E2000 PCIe host
>   hw/sd: Add Synopsys DesignWare MCI controller
>   hw/sd: Add Phytium E2000 MCI controller
>   hw/arm: phytium: Connect Phytium E2000 MCI controllers
>   tests/qtest: Add Synopsys DesignWare MCI coverage
>   hw/arm: phytium: Connect Phytium E2000 GEM controllers
>   hw/misc: Add Phytium E2000 DDR controller
>   hw/arm: phytium: Connect the Phytium E2000 DDR controller
>   hw/misc: Add Phytium E2000 MHU doorbell
>   hw/arm: phytium: Connect the Phytium E2000 MHU
>   hw/ssi: Add Phytium E2000 QSPI controller
>   hw/arm: phytium: Connect the Phytium E2000 QSPI controller
>   hw/misc: Add Phytium E2000 PBR model
>   hw/arm: phytium: Integrate the Phytium E2000 PBR
>   hw/arm: phytium: Add Phytium E2000 control region placeholders
>   hw/misc: Support Phytium E2000 SCMI CPU power control
>   hw/arm: phytium: Select the Phytium E2000 PBR boot medium
>   hw/arm: phytium: Connect the Phytium E2000 I2C controller
>   hw/arm: phytium: Add Phytium E2000 xHCI controllers
>   hw/misc: Model the Phytium E2000 random generator
>   hw/arm: phytium: Connect the Phytium E2000 random generator
>   hw/arm: phytium: Support Phytium E2000 direct Linux boot
>   hw/arm: phytium: Add Phytium E2000Q COMe machine
>   hw/block: m25p80: Add GigaDevice GD25Q128 flash
>   hw/arm: phytium: Connect the Phytium E2000Q COMe QSPI flash
>   hw/arm: phytium: Add Phytium E2000 AHCI controllers
>   hw/arm: Add Phytium E2000 Linux SCMI channel
>   hw/arm: phytium: Connect the Phytium E2000 SMMUv3
>   docs/system/arm: Document Phytium E2000 machines
>   tests/functional/aarch64: Add Phytium Pi boot tests
>   MAINTAINERS: Add Phytium E2000Q machines
>
>  MAINTAINERS                                 |   18 +
>  docs/system/arm/phytium_e2000.rst           |  422 ++++++
>  docs/system/target-arm.rst                  |    1 +
>  include/hw/arm/phytium_e2000.h              |  120 ++
>  include/hw/misc/phytium_e2000_ddr.h         |   23 +
>  include/hw/misc/phytium_e2000_mhu.h         |   34 +
>  include/hw/misc/phytium_e2000_pbr.h         |   62 +
>  include/hw/misc/phytium_e2000_rng.h         |   23 +
>  include/hw/sd/dw_mci.h                      |   75 +
>  include/hw/sd/phytium_e2000_mci.h           |   21 +
>  include/hw/ssi/phytium_qspi.h               |   23 +
>  hw/arm/phytium_e2000.c                      |  958 +++++++++++++
>  hw/arm/phytium_e2000_machine.c              |  388 ++++++
>  hw/block/m25p80.c                           |    1 +
>  hw/misc/phytium_e2000_ddr.c                 |  197 +++
>  hw/misc/phytium_e2000_mhu.c                 |  818 +++++++++++
>  hw/misc/phytium_e2000_pbr.c                 | 1366 ++++++++++++++++++
>  hw/misc/phytium_e2000_rng.c                 |  182 +++
>  hw/sd/dw_mci.c                              | 1382 +++++++++++++++++++
>  hw/sd/phytium_e2000_mci.c                   |   95 ++
>  hw/ssi/phytium_qspi.c                       |  398 ++++++
>  tests/qtest/dw_mci-test.c                   |  417 ++++++
>  hw/arm/Kconfig                              |   22 +
>  hw/arm/meson.build                          |    4 +
>  hw/misc/meson.build                         |    4 +
>  hw/sd/Kconfig                               |    5 +
>  hw/sd/meson.build                           |    2 +
>  hw/ssi/Kconfig                              |    5 +
>  hw/ssi/meson.build                          |    1 +
>  tests/functional/aarch64/meson.build        |    2 +
>  tests/functional/aarch64/test_phytium_pi.py |   77 ++
>  tests/qtest/meson.build                     |    1 +
>  32 files changed, 7147 insertions(+)
>  create mode 100644 docs/system/arm/phytium_e2000.rst
>  create mode 100644 include/hw/arm/phytium_e2000.h
>  create mode 100644 include/hw/misc/phytium_e2000_ddr.h
>  create mode 100644 include/hw/misc/phytium_e2000_mhu.h
>  create mode 100644 include/hw/misc/phytium_e2000_pbr.h
>  create mode 100644 include/hw/misc/phytium_e2000_rng.h
>  create mode 100644 include/hw/sd/dw_mci.h
>  create mode 100644 include/hw/sd/phytium_e2000_mci.h
>  create mode 100644 include/hw/ssi/phytium_qspi.h
>  create mode 100644 hw/arm/phytium_e2000.c
>  create mode 100644 hw/arm/phytium_e2000_machine.c
>  create mode 100644 hw/misc/phytium_e2000_ddr.c
>  create mode 100644 hw/misc/phytium_e2000_mhu.c
>  create mode 100644 hw/misc/phytium_e2000_pbr.c
>  create mode 100644 hw/misc/phytium_e2000_rng.c
>  create mode 100644 hw/sd/dw_mci.c
>  create mode 100644 hw/sd/phytium_e2000_mci.c
>  create mode 100644 hw/ssi/phytium_qspi.c
>  create mode 100644 tests/qtest/dw_mci-test.c
>  create mode 100644 tests/functional/aarch64/test_phytium_pi.py
>
> ---
> base-commit: 35500e5c41aec76cde59befe750600dac7a9e37a
> branch: phytium
>

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