SVE and SME helpers take tl, which is TCGv. A64 addresses and cpu_reg() are TCGv_i64, so convert with tcg_tl_from_i64. Truncate the SME tile index with extrl_i64_i32.
Signed-off-by: Yonggang Luo <[email protected]> --- target/arm/tcg/translate-sme.c | 5 +++-- target/arm/tcg/translate-sve.c | 18 ++++++++++-------- 2 files changed, 13 insertions(+), 10 deletions(-) diff --git a/target/arm/tcg/translate-sme.c b/target/arm/tcg/translate-sme.c index 08b25b0be9d..e34e7d8744f 100644 --- a/target/arm/tcg/translate-sme.c +++ b/target/arm/tcg/translate-sme.c @@ -64,7 +64,7 @@ static TCGv_ptr get_tile_rowcol(DisasContext *s, int esz, int rs, /* Compute the final index, which is Rs+imm. */ tmp = tcg_temp_new_i32(); - tcg_gen_trunc_tl_i32(tmp, cpu_reg(s, rs)); + tcg_gen_extrl_i64_i32(tmp, cpu_reg(s, rs)); /* * Round the vector index down to a multiple of vec_mod if necessary. * We do this before adding the offset, to handle cases like @@ -469,7 +469,8 @@ static bool trans_LDST1(DisasContext *s, arg_LDST1 *a) desc = make_svemte_desc(s, streaming_vec_reg_size(s), 1, a->esz, a->st, 0); - fns[a->esz][be][a->v][mte][a->st](tcg_env, t_za, t_pg, addr, + fns[a->esz][be][a->v][mte][a->st](tcg_env, t_za, t_pg, + tcg_tl_from_i64(addr), tcg_constant_i64(desc)); return true; } diff --git a/target/arm/tcg/translate-sve.c b/target/arm/tcg/translate-sve.c index 10375577b1e..9fd10168876 100644 --- a/target/arm/tcg/translate-sve.c +++ b/target/arm/tcg/translate-sve.c @@ -36,9 +36,9 @@ typedef void gen_helper_gvec_flags_3(TCGv_i32, TCGv_ptr, TCGv_ptr, typedef void gen_helper_gvec_flags_4(TCGv_i32, TCGv_ptr, TCGv_ptr, TCGv_ptr, TCGv_ptr, TCGv_i32); -typedef void gen_helper_gvec_mem(TCGv_env, TCGv_ptr, TCGv_i64, TCGv_i64); +typedef void gen_helper_gvec_mem(TCGv_env, TCGv_ptr, TCGv, TCGv_i64); typedef void gen_helper_gvec_mem_scatter(TCGv_env, TCGv_ptr, TCGv_ptr, - TCGv_ptr, TCGv_i64, TCGv_i64); + TCGv_ptr, TCGv, TCGv_i64); /* * Helpers for extracting complex instruction fields. @@ -5378,7 +5378,7 @@ static void do_mem_zpa(DisasContext *s, int zt, int pg, TCGv_i64 addr, t_pg = tcg_temp_new_ptr(); tcg_gen_addi_ptr(t_pg, tcg_env, pred_full_reg_offset(s, pg)); - fn(tcg_env, t_pg, addr, tcg_constant_i64(desc)); + fn(tcg_env, t_pg, tcg_tl_from_i64(addr), tcg_constant_i64(desc)); } /* Indexed by [mte][be][dtype][nreg] */ @@ -5861,7 +5861,7 @@ static void do_ldrq(DisasContext *s, int zt, int pg, TCGv_i64 addr, int dtype) gen_helper_gvec_mem *fn = ldr_fns[s->mte_active[0]][s->be_data == MO_BE][dtype][0]; desc = make_svemte_desc(s, 16, 1, dtype_msz(dtype), false, zt); - fn(tcg_env, t_pg, addr, tcg_constant_i64(desc)); + fn(tcg_env, t_pg, tcg_tl_from_i64(addr), tcg_constant_i64(desc)); /* Replicate that first quadword. */ if (vsz > 16) { @@ -5945,7 +5945,7 @@ static void do_ldro(DisasContext *s, int zt, int pg, TCGv_i64 addr, int dtype) gen_helper_gvec_mem *fn = ldr_fns[s->mte_active[0]][s->be_data == MO_BE][dtype][0]; desc = make_svemte_desc(s, 32, 1, dtype_msz(dtype), false, zt); - fn(tcg_env, t_pg, addr, tcg_constant_i64(desc)); + fn(tcg_env, t_pg, tcg_tl_from_i64(addr), tcg_constant_i64(desc)); /* * Replicate that first octaword. @@ -6286,7 +6286,8 @@ static void do_mem_zpz(DisasContext *s, int zt, int pg, int zm, tcg_gen_addi_ptr(t_zt, tcg_env, vec_full_reg_offset(s, zt)); desc = make_svemte_desc(s, vec_full_reg_size(s), 1, msz, is_write, scale); - fn(tcg_env, t_zt, t_pg, t_zm, scalar, tcg_constant_i64(desc)); + fn(tcg_env, t_zt, t_pg, t_zm, tcg_tl_from_i64(scalar), + tcg_constant_i64(desc)); } /* Indexed by [mte][be][ff][xs][u][msz]. */ @@ -8682,7 +8683,7 @@ TRANS_FEAT(SQCVTUN_sh, aa64_sme2_or_sve2p1, gen_gvec_ool_zz, static bool gen_ldst_c(DisasContext *s, TCGv_i64 addr, int zd, int png, MemOp esz, bool is_write, int n, bool strided) { - typedef void ldst_c_fn(TCGv_env, TCGv_ptr, TCGv_i64, + typedef void ldst_c_fn(TCGv_env, TCGv_ptr, TCGv, TCGv_i32, TCGv_i64); static ldst_c_fn * const f_ldst[2][2][4] = { { { gen_helper_sve2p1_ld1bb_c, @@ -8747,7 +8748,8 @@ static bool gen_ldst_c(DisasContext *s, TCGv_i64 addr, int zd, int png, t_zd = tcg_temp_new_ptr(); tcg_gen_addi_ptr(t_zd, tcg_env, vec_full_reg_offset(s, zd)); - f_ldst[is_write][be][esz](tcg_env, t_zd, addr, t_png, t_desc); + f_ldst[is_write][be][esz](tcg_env, t_zd, tcg_tl_from_i64(addr), + t_png, t_desc); return true; } -- 2.52.0.windows.1
