From: Richard Henderson <[email protected]>
With vtype uninitialized, VILL might be set, leading to SIGILL.
Also, assert vtype initialized for whole-register stores and moves.
Fixes: f63e7089b4 ("tcg/riscv: Add basic support for vector")
Reported-by: Max Chou <[email protected]>
Reviewed-by: Palmer Dabbelt <[email protected]>
Signed-off-by: Richard Henderson <[email protected]>
(cherry picked from commit 57d98debdf8a3a00e6022ad5c4dad1d8c4fa0f39)
Signed-off-by: Michael Tokarev <[email protected]>
diff --git a/tcg/riscv/tcg-target.c.inc b/tcg/riscv/tcg-target.c.inc
index ec13d8fee9f..4e2cc24a862 100644
--- a/tcg/riscv/tcg-target.c.inc
+++ b/tcg/riscv/tcg-target.c.inc
@@ -784,6 +784,7 @@ static bool tcg_out_mov(TCGContext *s, TCGType type, TCGReg
ret, TCGReg arg)
case TCG_TYPE_V64:
case TCG_TYPE_V128:
case TCG_TYPE_V256:
+ tcg_debug_assert(s->riscv_cur_type != TCG_TYPE_COUNT);
{
int lmul = type - riscv_lg2_vlenb;
int nf = 1 << MAX(lmul, 0);
@@ -1023,6 +1024,10 @@ static void tcg_out_ld(TCGContext *s, TCGType type,
TCGReg arg,
unsigned idx = type - riscv_lg2_vlenb;
tcg_debug_assert(idx < ARRAY_SIZE(whole_reg_ld));
+ /* We must initialize vtype to something to avoid VILL. */
+ if (s->riscv_cur_type == TCG_TYPE_COUNT) {
+ set_vtype(s, type, MO_8);
+ }
insn = whole_reg_ld[idx];
} else {
static const RISCVInsn unit_stride_ld[] = {
@@ -1055,6 +1060,7 @@ static void tcg_out_st(TCGContext *s, TCGType type,
TCGReg arg,
case TCG_TYPE_V64:
case TCG_TYPE_V128:
case TCG_TYPE_V256:
+ tcg_debug_assert(s->riscv_cur_type != TCG_TYPE_COUNT);
if (type >= riscv_lg2_vlenb) {
static const RISCVInsn whole_reg_st[] = {
OPC_VS1R_V, OPC_VS2R_V, OPC_VS4R_V, OPC_VS8R_V
--
2.47.3
