Hi reviewers
Please help to review this patch set
[v7] Add Axiado SoC AX3005 and EVB | Patchew
<https://patchew.org/QEMU/[email protected]/>
Kuan-Jui Chiu 於 2026/9/11 下午 01:15 寫道:
This patchset introduces Axiado SoC AX3005 and evaluation board for emulation
The model for Axiado SoC AX3005 supports
4 Cortex-A53 CPUs
Arm Generic Interrupt Controller v3
9 Cadence UARTs
1 SDHCI controller with PHY
8 Cadence GPIOs
Refer Axiado website for more product information
https://axiado.com/products/
and minor changes for the compatibility with existing AX3000 SoC model
Test plan:
1. Verified the machine "ax3005-evb" with following command
qemu-system-aarch64 \
-machine ax3005-evb \
-device loader,file=bl31.bin,addr=0x88300000 \
-device loader,file=tee-raw.bin,addr=0x88400000 \
-device loader,file=u-boot.bin,addr=0x80000000 \
-device loader,file=fitImage,addr=0x80100000 \
-device
loader,file=obmc-phosphor-image-evk-ax3005-qemu.squashfs-xz,addr=0x80B00000 \
-device loader,cpu-num=0,addr=0x88300000 \
-device loader,cpu-num=1,addr=0x88300000 \
-device loader,cpu-num=2,addr=0x88300000 \
-device loader,cpu-num=3,addr=0x88300000 \
-nographic \
-serial null \
-serial null \
-serial null \
-serial mon:stdio \
-drive
if=sd,file=obmc-phosphor-image-evk-ax3005-qemu.wic.qcow2,format=qcow2
2. Run QEMU test suite
make check
Ok: 360
Fail: 0
Skipped: 21
make check-functional
Ok: 31
Fail: 0
Skipped: 6
Changes in v7:
1. Add patch ("hw/arm/ax3000-soc: Revise variables accodring to QEMU idioms")
to revise the name of the first member in struct and remove redundant
typedef keyword
2. Add Prasad Bolisetty into maintainer list
3. Fix typo
Changes in v6:
1. Drop patch ("hw/sd/axiado_sdhci: Add header guard") since it had been
merged
2. Remove redundant machines-qom.h
Changes in v5:
1. Add patch ("hw/char/cadence_uart: Add BXRS register definition") to add
BXRS register into CADENCE UART model and add new property to control this
feature.
2. Drop patch ("hw/char/cadence_uart: Reserve MMIO with dynamic size")
3. Add patch ("hw/arm/ax3000-soc: Enable BXRS support of CADENCE UART") to
enable BXRS support in Ax3000 SoC
4. Add patch ("hw/char/cadence_uart: Reduce the size of MMIO to 0x80") to
change the MMIO size to 0x80 from 0x1000.
5. Add patch for Ax3000 SoC
("hw/arm/ax3000-boards: Add modify_dtb for discontiguous memory") to fix
memory issue while -dtb option is applied
6. Add patch for Ax3000 SoC
("hw/arm/ax3000-boards: Remove redundant pointer from struct") to create
SoC instance during init() and remove redundant pointer from struct
7. Add document for Axiado SoCs and EVKs
8. Add functional test for Axiado SoCs and EVKs
Changes in v4:
1. Add patch ("hw/char/cadence_uart: Reserve MMIO with dynamic size") which
allow other models to revise the MMIO size of Cadence UART
2. Change the MMIO size of Cadence UART to 512 KiB in Ax3000/Ax3005 SoC to
resolve the overlapping region issue
3. Add memory guard in Ax3000/Ax3005 EVK to check the memory size specified
by
-m option and set the default_ram_size to the RAM size supported by Axiado
SoC
Changes in v3:
1. Remove patch ("hw/arm/ax3000-soc: Add missing class_size to TypeInfo")
because it was fixed by commit 4f50d637e2
("hw/arm/ax3000-soc: fix heap overflow from missing class_size")
Changes in v2:
1. Add patch "hw/arm/ax3000-soc: Add missing class_size to TypeInfo"
to fix incorrect class size
2. Add missing class_size "Ax3005SoCClass" to ax3005_soc_types
Kuan-Jui Chiu (13):
hw/char/cadence_uart: Reduce the size of MMIO to 0x80
hw/char/cadence_uart: Add BXRS register definition
hw/arm/ax3000-soc: Enable BXRS support of CADENCE UART
hw/arm: Rename ax3000-boards as axiado-boards
hw/arm/ax3000: Specify SoC name in header and variable
hw/arm/ax3000-boards: Add memory guard
hw/arm/ax3000-boards: Add modify_dtb for discontiguous memory
hw/arm/ax3000-boards: Remove redundant pointer from struct
hw/arm/ax3000-soc: Revise variables accodring to QEMU idioms
hw/arm: Add Axiado SoC AX3005
hw/arm: Add Axiado Ax3005 EVB
docs/system/arm: Document Axiado boards
tests/functional/aarch64: Add functional test for Axiado EVKs
MAINTAINERS | 6 +
docs/system/arm/axiado.rst | 128 ++++++++++
docs/system/target-arm.rst | 1 +
hw/arm/ax3000-boards.c | 71 +++++-
hw/arm/ax3000-evk.c | 4 +-
hw/arm/ax3000-soc.c | 5 +-
hw/arm/ax3005-evk.c | 115 +++++++++
hw/arm/ax3005-soc.c | 226 ++++++++++++++++++
hw/arm/meson.build | 6 +-
hw/char/cadence_uart.c | 17 +-
include/hw/arm/ax3000-soc.h | 13 +-
include/hw/arm/ax3005-soc.h | 102 ++++++++
.../arm/{ax3000-boards.h => axiado-boards.h} | 10 +-
include/hw/char/cadence_uart.h | 4 +-
tests/functional/aarch64/meson.build | 4 +
tests/functional/aarch64/test_ax3005_evb.py | 140 +++++++++++
.../functional/aarch64/test_axiado_scm3003.py | 62 +++++
17 files changed, 889 insertions(+), 25 deletions(-)
create mode 100644 docs/system/arm/axiado.rst
create mode 100644 hw/arm/ax3005-evk.c
create mode 100644 hw/arm/ax3005-soc.c
create mode 100644 include/hw/arm/ax3005-soc.h
rename include/hw/arm/{ax3000-boards.h => axiado-boards.h} (71%)
create mode 100755 tests/functional/aarch64/test_ax3005_evb.py
create mode 100755 tests/functional/aarch64/test_axiado_scm3003.py
