Reviewed-by: Caleb Schlossin <[email protected]> On 8/31/26 7:30 AM, Saif Abrar wrote: > From: Saif Abrar <[email protected]> > > IODA PCT table is implemented > without any functionality, being a debug table. > > Signed-off-by: Saif Abrar <[email protected]> > Reviewed-by: Cédric Le Goater <[email protected]> > Reviewed-by: Caleb Schlossin <[email protected]> > Reviewed-by: Aditya Gupta <[email protected]> > --- > hw/pci-host/pnv_phb4.c | 7 +++++++ > include/hw/pci-host/pnv_phb4.h | 2 ++ > include/hw/pci-host/pnv_phb4_regs.h | 1 + > 3 files changed, 10 insertions(+) > > diff --git a/hw/pci-host/pnv_phb4.c b/hw/pci-host/pnv_phb4.c > index 56952a6200..5f84550a7c 100644 > --- a/hw/pci-host/pnv_phb4.c > +++ b/hw/pci-host/pnv_phb4.c > @@ -264,6 +264,11 @@ static uint64_t *pnv_phb4_ioda_access(PnvPHB4 *phb, > mask = phb->big_phb ? PNV_PHB4_MAX_MIST : (PNV_PHB4_MAX_MIST >> 1); > mask -= 1; > break; > + case IODA3_TBL_PCT: > + tptr = phb->ioda_PCT; > + mask = phb->big_phb ? PNV_PHB4_MAX_PCT : (PNV_PHB4_MAX_PCT >> 1); > + mask -= 1; > + break; > case IODA3_TBL_RCAM: > mask = phb->big_phb ? 127 : 63; > break; > @@ -362,6 +367,8 @@ static void pnv_phb4_ioda_write(PnvPHB4 *phb, uint64_t > val) > /* Handle side effects */ > switch (table) { > case IODA3_TBL_LIST: > + case IODA3_TBL_PCT: > + /* No action for debug tables */ > break; > case IODA3_TBL_MIST: { > /* Special mask for MIST partial write */ > diff --git a/include/hw/pci-host/pnv_phb4.h b/include/hw/pci-host/pnv_phb4.h > index 33e11a3fe8..8d5822f339 100644 > --- a/include/hw/pci-host/pnv_phb4.h > +++ b/include/hw/pci-host/pnv_phb4.h > @@ -65,6 +65,7 @@ OBJECT_DECLARE_SIMPLE_TYPE(PnvPHB4RootBus, > PNV_PHB4_ROOT_BUS) > #define PNV_PHB4_MAX_LSIs 8 > #define PNV_PHB4_MAX_INTs 4096 > #define PNV_PHB4_MAX_MIST (PNV_PHB4_MAX_INTs >> 2) > +#define PNV_PHB4_MAX_PCT (128 * 2) > #define PNV_PHB4_MAX_MMIO_WINDOWS 32 > #define PNV_PHB4_MIN_MMIO_WINDOWS 16 > #define PNV_PHB4_NUM_REGS (0x3000 >> 3) > @@ -138,6 +139,7 @@ struct PnvPHB4 { > /* On-chip IODA tables */ > uint64_t ioda_LIST[PNV_PHB4_MAX_LSIs]; > uint64_t ioda_MIST[PNV_PHB4_MAX_MIST]; > + uint64_t ioda_PCT[PNV_PHB4_MAX_PCT]; > uint64_t ioda_TVT[PNV_PHB4_MAX_TVEs]; > uint64_t ioda_MBT[PNV_PHB4_MAX_MBEs]; > uint64_t ioda_MDT[PNV_PHB4_MAX_PEs]; > diff --git a/include/hw/pci-host/pnv_phb4_regs.h > b/include/hw/pci-host/pnv_phb4_regs.h > index 9ad6713d37..897c869d20 100644 > --- a/include/hw/pci-host/pnv_phb4_regs.h > +++ b/include/hw/pci-host/pnv_phb4_regs.h > @@ -478,6 +478,7 @@ > > #define IODA3_TBL_LIST 1 > #define IODA3_TBL_MIST 2 > +#define IODA3_TBL_PCT 3 > #define IODA3_TBL_RCAM 5 > #define IODA3_TBL_MRT 6 > #define IODA3_TBL_PESTA 7
