On 9/30/26 4:15 AM, Philippe Mathieu-Daudé wrote:
On 30/9/26 12:34, Yonggang Luo wrote:
Fixes: acd2b7a2f19 target/hexagon: Implement wait helper
Not sure if this one or 40085901dbe or another one.
DisasContextBase::pc_next is of type vaddr, which expands
to uint32_t on hexagon. Pierrick has a better view on which
type is better here.
Hexagon arch has a 32-bit address space, so i32 variant is correct when
manipulating a vaddr. I'm not sure what current commit is supposed to
fix though.
There are a lot of _tl usage in hexagon, but we agreed (internally) to
delay the cleanup until all our downstream patches are merged upstream,
to prevent conflicting with ourselves when rebasing our private branches.
There is still inconsistency to clean (later), up to the
maintainers:
target/hexagon/genptr.c:429: tcg_gen_movi_tl(dest,
ctx->base.pc_next);
target/hexagon/genptr.c:469: TCGv pc =
tcg_constant_tl(ctx->base.pc_next);
target/hexagon/translate.c:251: target_ulong fail_pc =
ctx->base.pc_next + nwords * sizeof(uint32_t);
target/hexagon/translate.c:580: target_ulong next_PC =
ctx->base.pc_next + pkt->encod_pkt_size_in_bytes;
target/hexagon/translate.c:1383:
tcg_gen_movi_tl(hex_gpr[HEX_REG_PC], ctx->base.pc_next);
Signed-off-by: Yonggang Luo <[email protected]>
---
target/hexagon/gen_tcg_sys.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/hexagon/gen_tcg_sys.h b/target/hexagon/gen_tcg_sys.h
index af5032214c..faec55f502 100644
--- a/target/hexagon/gen_tcg_sys.h
+++ b/target/hexagon/gen_tcg_sys.h
@@ -80,7 +80,7 @@
#define fGEN_TCG_Y2_wait(SHORTCODE) \
do { \
RsV = RsV; \
- gen_helper_wait(tcg_env, tcg_constant_tl(ctx->pkt.pc)); \
+ gen_helper_wait(tcg_env, tcg_constant_i32(ctx->pkt.pc)); \
} while (0)
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
