On Tue, 29 Sep 2026 21:08:38 +0900, Philippe Mathieu-Daudé wrote: > > From: Yonggang Luo <[email protected]> > > Name RX exception vectors and trap ranges, and use the > definitions throughout exception handling and exception > raising. > > Assert that exception indexes remain within the defined > range before accessing their vector tables. > > Signed-off-by: Yonggang Luo <[email protected]> > Co-developed-by: Philippe Mathieu-Daudé <[email protected]> > Signed-off-by: Philippe Mathieu-Daudé <[email protected]> > --- > target/rx/cpu.h | 13 +++++++++++++ > target/rx/helper.c | 21 +++++++++++---------- > target/rx/op_helper.c | 10 +++++----- > target/rx/translate.c | 2 +- > 4 files changed, 30 insertions(+), 16 deletions(-) > > diff --git a/target/rx/cpu.h b/target/rx/cpu.h > index 64ba48a7329..0d9f4898a26 100644 > --- a/target/rx/cpu.h > +++ b/target/rx/cpu.h > @@ -71,6 +71,19 @@ enum { > NUM_REGS = 16, > }; > > +#define RX_EXCP_TRAP_COUNT 0x100 > + > +enum { > + RX_EXCP_PRIVILEGE_VIOLATION = 20, > + RX_EXCP_ACCESS = 21, > + RX_EXCP_ILLEGAL_INSTRUCTION = 23, > + RX_EXCP_FPU = 25, > + RX_EXCP_NMI = 30, > + RX_EXCP_TRAP_BASE = 0x100, /* Up to RX_EXCP_TRAP_COUNT */ > +}; > + > +#define RX_EXCP_COUNT (RX_EXCP_TRAP_BASE + RX_EXCP_TRAP_COUNT) > + > typedef struct CPUArchState { > /* CPU registers */ > uint32_t regs[NUM_REGS]; /* general registers */ > diff --git a/target/rx/helper.c b/target/rx/helper.c > index 0f99279bbaa..bc76dd28ab3 100644 > --- a/target/rx/helper.c > +++ b/target/rx/helper.c > @@ -86,13 +86,14 @@ void rx_cpu_do_interrupt(CPUState *cs) > env->isp -= 4; > cpu_stl_le_data(env, env->isp, env->pc); > > - if (vec < 0x100) { > - env->pc = cpu_ldl_le_data(env, 0xffffff80 + vec * 4); > - } else { > + assert(vec < RX_EXCP_COUNT); > + if (vec >= RX_EXCP_TRAP_BASE) { > env->pc = cpu_ldl_le_data(env, env->intb + (vec & 0xff) * 4); > + } else { > + env->pc = cpu_ldl_le_data(env, 0xffffff80 + vec * 4); > } > > - if (vec == 30) { > + if (vec == RX_EXCP_NMI) { > /* Non-maskable interrupt */ > qemu_plugin_vcpu_interrupt_cb(cs, last_pc); > } else { > @@ -100,22 +101,22 @@ void rx_cpu_do_interrupt(CPUState *cs) > } > > switch (vec) { > - case 20: > + case RX_EXCP_PRIVILEGE_VIOLATION: > expname = "privilege violation"; > break; > - case 21: > + case RX_EXCP_ACCESS: > expname = "access exception"; > break; > - case 23: > + case RX_EXCP_ILLEGAL_INSTRUCTION: > expname = "illegal instruction"; > break; > - case 25: > + case RX_EXCP_FPU: > expname = "fpu exception"; > break; > - case 30: > + case RX_EXCP_NMI: > expname = "non-maskable interrupt"; > break; > - case 0x100 ... 0x1ff: > + case RX_EXCP_TRAP_BASE ... RX_EXCP_TRAP_BASE + RX_EXCP_TRAP_COUNT - > 1: > expname = "unconditional trap"; > } > qemu_log_mask(CPU_LOG_INT, "exception 0x%02x [%s] raised\n", > diff --git a/target/rx/op_helper.c b/target/rx/op_helper.c > index 6782912247e..d4e9ac2f192 100644 > --- a/target/rx/op_helper.c > +++ b/target/rx/op_helper.c > @@ -115,7 +115,7 @@ static void update_fpsw(CPURXState *env, float32 ret, > uintptr_t retaddr) > enable = FIELD_EX32(env->fpsw, FPSW, ENABLE); > enable |= 1 << 5; /* CE always enabled */ > if (cause & enable) { > - raise_exception(env, 21, retaddr); > + raise_exception(env, RX_EXCP_ACCESS, retaddr); > } > } > } > @@ -432,17 +432,17 @@ void raise_exception(CPURXState *env, int index, > > G_NORETURN void helper_raise_privilege_violation(CPURXState *env) > { > - raise_exception(env, 20, GETPC()); > + raise_exception(env, RX_EXCP_PRIVILEGE_VIOLATION, GETPC()); > } > > G_NORETURN void helper_raise_access_fault(CPURXState *env) > { > - raise_exception(env, 21, GETPC()); > + raise_exception(env, RX_EXCP_ACCESS, GETPC()); > } > > G_NORETURN void helper_raise_illegal_instruction(CPURXState *env) > { > - raise_exception(env, 23, GETPC()); > + raise_exception(env, RX_EXCP_ILLEGAL_INSTRUCTION, GETPC()); > } > > G_NORETURN void helper_wait(CPURXState *env) > @@ -457,5 +457,5 @@ G_NORETURN void helper_wait(CPURXState *env) > > G_NORETURN void helper_trap(CPURXState *env, uint32_t vec) > { > - raise_exception(env, 0x100 + vec, 0); > + raise_exception(env, RX_EXCP_TRAP_BASE + vec, 0); > } > diff --git a/target/rx/translate.c b/target/rx/translate.c > index d0910fbf8e7..1bacc7adf92 100644 > --- a/target/rx/translate.c > +++ b/target/rx/translate.c > @@ -2187,7 +2187,7 @@ static bool trans_BRK(DisasContext *ctx, arg_BRK *a) > /* int #imm */ > static bool trans_INT(DisasContext *ctx, arg_INT *a) > { > - tcg_debug_assert(a->imm < 0x100); > + tcg_debug_assert(a->imm < RX_EXCP_TRAP_COUNT); > return do_trap(ctx, a->imm); > } > > -- > 2.53.0 >
Reviewed-by: Yoshinori Sato <[email protected]> -- Yosinori Sato
