Many TCG targets copy the same two-line raise: set cs->exception_index and call cpu_loop_exit_restore. They also copy DEF_HELPER_2(raise_exception, ...). helper_raise_exception is a global C symbol, so a unified binary cannot keep that name on more than one target.
This series adds two shared C exits and two shared TCG helpers, then converts one target per commit. Joiners call gen_helper_raise_excp or gen_helper_raise_excp_restore and drop the copied DEF. The shared helpers only touch CPUState. Translate may store arch state (error_code, PC) first. A callback that may pass a zero retaddr keeps the explicit cpu_loop_exit_restore form. Guest trap numbers stay below 0x10000. TCG loop codes such as EXCP_INTERRUPT start at 0x10000. - Move helper_exit_atomic into cpu-exec-common.c with its DEF_HELPER, so the new helpers can sit beside it. - Add cpu_raise_excp and cpu_raise_excp_restore next to cpu_loop_exit_restore. The first sets exception_index and exits without restoring guest state. The second restores from a nonzero retaddr, and skips restore when retaddr is 0. - Add TCG raise_excp and raise_excp_restore beside those exits. raise_excp calls cpu_raise_excp. raise_excp_restore calls cpu_raise_excp_restore with GETPC(). Each helper does one thing. - Unify RX BRK and INT, then define RX and SH4 exception vectors and use them at the raise sites. Log the previously unnamed SH4 vectors. Join privilege and illegal on RX through raise_excp_restore, and BRK and INT through raise_excp. Join illegal, slot-illegal, and FPU-disable on SH4. Keep RX wait and SH4 sleep, trapa, and exclusive. - Drop HPPA helper_excp, then drop hppa_dynamic_excp. Convert the remaining joiners one arch per commit: m68k, or1k, microblaze, sparc, loongarch, s390x, xtensa, avr, arm exception_internal, mips, and ppc. Store error_code or PC in translate where needed, then call the shared helper. loongarch and the mips 2-arg path use raise_excp_restore. C wrappers that only forward stay static inline. - Reset Xtensa yield_needed in gen_yield before that conversion. Reuse the ppc error-aware NIP path before the ppc conversion. Call MIPS do_raise_exception directly from the FPU helpers before the MIPS conversion. - Keep riscv and hexagon TCG raise_exception. riscv still decrements instret, and hexagon still logs, stores PC, and asserts. Their C exits call cpu_raise_excp_restore. Tricore raise_exception_sync, alpha excp, and i386 raise_exception do not join. v1: https://patchew.org/QEMU/[email protected]/ v2: https://patchew.org/QEMU/[email protected]/ Changes v2 -> v3: - Replace cpu_loop_exit_excp with cpu_raise_excp and cpu_raise_excp_restore. The no-restore path has no retaddr argument. The restore path restores only when retaddr is nonzero. - Split the HPPA conversion. Drop helper_excp, then drop hppa_dynamic_excp. - Define RX and SH4 vectors in the commits that use them. Take Philippe's RX BRK and INT unification. Log the unnamed SH4 vectors in its own commit. - Do not prefix riscv or hexagon TCG raise_exception. Keep their extra work in those helpers, and route the C exits through cpu_raise_excp_restore. - Omit the alpha conversion. On microblaze, keep the MMU callback on cpu_loop_exit_restore when retaddr may be zero. Changes v1 -> v2: - Move helper_exit_atomic into cpu-exec-common.c. Split the restore flag into raise_excp and raise_excp_restore, and define both there. - Drop the helper-gen nested-extern change. - Shorten the cpu_loop_exit_excp comment. Drop the generic EXCP_INTERRUPT note on the RX and SH4 trap enums, and put those enums in their own commits. - Split xtensa gen_yield and the ppc gen_exception_nip fold out of the conversion commits. - Omit the i386 conversion, the rx, mips, and hexagon helper_wait renames, and the arm raise_exception rename. Philippe Mathieu-Daudé (1): target/rx: Unify BRK and INT trap handling Yonggang Luo (26): accel/tcg: move helper_exit_atomic next to cpu_loop_exit_atomic accel/tcg: add cpu_raise_excp and cpu_raise_excp_restore helpers accel/tcg: add raise_excp and raise_excp_restore generator helpers target/rx: Define exception vector constants target/sh4: Define exception vector constants target/hppa: remove helper_excp target/hppa: remove hppa_dynamic_excp target/rx: convert raises to raise_excp target/sh4: log all exception vector names target/sh4: convert raises to raise_excp target/s390x: convert exception to raise_excp target/m68k: convert raises to raise_excp target/or1k: convert exception to raise_excp target/microblaze: convert raise_exception to raise_excp target/sparc: convert raise_exception to raise_excp target/loongarch: convert raise_exception to raise_excp target/hexagon: reuse cpu_raise_excp_restore target/xtensa: reset yield state in the icount path target/xtensa: convert exception to raise_excp target/avr: convert debug/break/sleep to raise_excp target/arm: convert exception_internal to raise_excp target/riscv: use cpu_raise_excp_restore for exception exits target/mips: call do_raise_exception directly target/mips: use shared TCG exception helpers target/ppc: reuse the error-aware NIP exception path target/ppc: use shared helpers for translated exceptions accel/tcg/cpu-exec-common.c | 35 +++++++++++++++ accel/tcg/cpu-exec-common.h | 4 ++ accel/tcg/tcg-runtime.c | 8 ---- accel/tcg/tcg-runtime.h | 2 - include/accel/tcg/cpu-loop.h | 22 +++++++++ include/exec/helper-gen-common.h | 4 ++ include/exec/helper-proto-common.h | 4 ++ target/arm/tcg/helper-defs.h | 1 - target/arm/tcg/m_helper.c | 3 +- target/arm/tcg/op_helper.c | 33 +++----------- target/arm/tcg/translate.c | 2 +- target/avr/helper.c | 24 ---------- target/avr/helper.h | 3 -- target/avr/translate.c | 4 +- target/hexagon/internal.h | 10 ++++- target/hexagon/op_helper.c | 5 +-- target/hppa/cpu.h | 1 - target/hppa/fpu_helper.c | 3 +- target/hppa/helper.h | 2 - target/hppa/op_helper.c | 18 +------- target/hppa/sys_helper.c | 5 ++- target/hppa/translate.c | 2 +- target/loongarch/internals.h | 12 +++-- target/loongarch/tcg/helper.h | 2 - target/loongarch/tcg/op_helper.c | 6 --- target/loongarch/tcg/tcg_cpu.c | 10 ++--- target/loongarch/tcg/translate.c | 2 +- target/m68k/helper.c | 12 +---- target/m68k/helper.h | 1 - target/m68k/op_helper.c | 19 -------- target/m68k/translate.c | 2 +- target/microblaze/helper.h | 2 - target/microblaze/op_helper.c | 19 ++------ target/microblaze/translate.c | 2 +- target/mips/cpu.h | 2 +- target/mips/helper.h | 4 -- target/mips/tcg/exception.c | 27 +---------- target/mips/tcg/fpu_helper.c | 6 +-- target/mips/tcg/translate.c | 9 ++-- target/or1k/exception.c | 31 ------------- target/or1k/exception.h | 7 ++- target/or1k/exception_helper.c | 13 +----- target/or1k/helper.h | 1 - target/or1k/meson.build | 1 - target/or1k/translate.c | 2 +- target/ppc/cpu.h | 5 +-- target/ppc/helper.h | 2 - target/ppc/internal.h | 9 ++++ target/ppc/misc_helper.c | 1 + target/ppc/tcg-excp_helper.c | 21 --------- target/ppc/timebase_helper.c | 1 + target/ppc/translate.c | 20 +++------ target/riscv/tcg/op_helper.c | 3 +- target/rx/cpu.h | 13 ++++++ target/rx/helper.c | 21 ++++----- target/rx/helper.h | 5 --- target/rx/op_helper.c | 44 +----------------- target/rx/translate.c | 28 ++++++------ target/s390x/helper.h | 1 - target/s390x/tcg/mem_helper.c | 2 +- target/s390x/tcg/misc_helper.c | 10 ----- target/s390x/tcg/translate.c | 2 +- target/sh4/cpu.h | 21 +++++++++ target/sh4/helper.c | 72 +++++++++++++++++------------- target/sh4/helper.h | 4 -- target/sh4/op_helper.c | 40 +++-------------- target/sh4/translate.c | 12 +++-- target/sparc/helper.c | 21 ++------- target/sparc/helper.h | 2 - target/sparc/translate.c | 6 +-- target/xtensa/cpu.h | 2 +- target/xtensa/exc_helper.c | 17 ++----- target/xtensa/helper.h | 1 - target/xtensa/translate.c | 8 ++-- target/xtensa/win_helper.c | 13 +++--- 75 files changed, 300 insertions(+), 494 deletions(-) create mode 100644 accel/tcg/cpu-exec-common.h delete mode 100644 target/or1k/exception.c -- 2.52.0.windows.1
