The riscv virt board uses a 16550 UART with an 8-bit register stride,
but the SPCR table reports 32, which looks to have been copied from
arm virt, whose PL011 has a 32-bit stride. Change it to the correct
stride for a 16550.
Fixes: 3e6f1e61b4 ("hw/riscv/virt-acpi-build.c: Generate SPCR table")
Signed-off-by: Rick Richard <[email protected]>
Reviewed-by: Daniel Henrique Barboza <[email protected]>
---
hw/riscv/virt-acpi-build.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/riscv/virt-acpi-build.c b/hw/riscv/virt-acpi-build.c
index 8e516ec1..0475dcb5 100644
--- a/hw/riscv/virt-acpi-build.c
+++ b/hw/riscv/virt-acpi-build.c
@@ -246,7 +246,7 @@ spcr_setup(GArray *table_data, BIOSLinker *linker,
RISCVVirtState *s)
AcpiSpcrData serial = {
.interface_type = 0x12, /* 16550 compatible */
.base_addr.id = AML_AS_SYSTEM_MEMORY,
- .base_addr.width = 32,
+ .base_addr.width = 8,
.base_addr.offset = 0,
.base_addr.size = 1,
.base_addr.addr = s->memmap[VIRT_UART0].base,
--
2.43.0
