Add the 128 KiB ITCM and DTCM used by the i.MX8MP Cortex-M7 subsystem. Expose ITCM and DTCM using the system-bus windows available to the Cortex-A53, and add the Cortex-M7-visible aliases at 0x00000000 and 0x20000000 respectively.
Signed-off-by: Gaurav Sharma <[email protected]> --- hw/arm/fsl-imx8mp.c | 33 +++++++++++++++++++++++++++++++++ include/hw/arm/fsl-imx8mp.h | 4 ++++ 2 files changed, 37 insertions(+) diff --git a/hw/arm/fsl-imx8mp.c b/hw/arm/fsl-imx8mp.c index c168c97d1a..18d2b17ca8 100644 --- a/hw/arm/fsl-imx8mp.c +++ b/hw/arm/fsl-imx8mp.c @@ -779,6 +779,37 @@ static void fsl_imx8mp_realize(DeviceState *dev, Error **errp) fsl_imx8mp_memmap[FSL_IMX8MP_OCRAM].addr, &s->ocram); + if (!memory_region_init_ram(&s->itcm, OBJECT(dev), "imx8mp.itcm", + fsl_imx8mp_memmap[FSL_IMX8MP_TCM_ITCM].size, + errp)) { + return; + } + memory_region_add_subregion(get_system_memory(), + fsl_imx8mp_memmap[FSL_IMX8MP_TCM_ITCM].addr, + &s->itcm); + + if (!memory_region_init_ram(&s->dtcm, OBJECT(dev), "imx8mp.dtcm", + fsl_imx8mp_memmap[FSL_IMX8MP_TCM_DTCM].size, + errp)) { + return; + } + memory_region_add_subregion(get_system_memory(), + fsl_imx8mp_memmap[FSL_IMX8MP_TCM_DTCM].addr, + &s->dtcm); + + /* M7-view aliases: ITCM@0x0, DTCM@0x20000000 */ + memory_region_init_alias(&s->itcm_alias, OBJECT(dev), "imx8mp.itcm-alias", + &s->itcm, 0, + fsl_imx8mp_memmap[FSL_IMX8MP_TCM_ITCM].size); + memory_region_add_subregion_overlap(get_system_memory(), + 0x00000000, &s->itcm_alias, 1); + + memory_region_init_alias(&s->dtcm_alias, OBJECT(dev), "imx8mp.dtcm-alias", + &s->dtcm, 0, + fsl_imx8mp_memmap[FSL_IMX8MP_TCM_DTCM].size); + memory_region_add_subregion_overlap(get_system_memory(), + 0x20000000, &s->dtcm_alias, 1); + /* Unimplemented devices */ for (i = 0; i < ARRAY_SIZE(fsl_imx8mp_memmap); i++) { switch (i) { @@ -796,6 +827,8 @@ static void fsl_imx8mp_realize(DeviceState *dev, Error **errp) case FSL_IMX8MP_IOMUXC_GPR: case FSL_IMX8MP_MU_1_A ... FSL_IMX8MP_MU_3_B: case FSL_IMX8MP_OCRAM: + case FSL_IMX8MP_TCM_ITCM: + case FSL_IMX8MP_TCM_DTCM: case FSL_IMX8MP_PCIE1: case FSL_IMX8MP_PCIE_PHY1: case FSL_IMX8MP_RAM: diff --git a/include/hw/arm/fsl-imx8mp.h b/include/hw/arm/fsl-imx8mp.h index f3e134cdc0..f547cbae42 100644 --- a/include/hw/arm/fsl-imx8mp.h +++ b/include/hw/arm/fsl-imx8mp.h @@ -90,6 +90,10 @@ struct FslImx8mpState { FlexcanState flexcan[FSL_IMX8MP_NUM_CANS]; OrIRQState gpt5_gpt6_irq; MemoryRegion ocram; + MemoryRegion itcm; + MemoryRegion dtcm; + MemoryRegion itcm_alias; + MemoryRegion dtcm_alias; uint32_t phy_num; bool phy_connected; -- 2.34.1
