On 14/9/26 18:00, Peter Maydell wrote:
Currently the GICv5 cpu interface directly calls cpu_interrupt() and
cpu_reset_interrupt() to raise and lower IRQ and FIQ. This is almost
but not exactly what we do for GICv2/GICv3 external GPIO IRQ/FIQ line
changes. Those are handled by arm_cpu_set_irq(), and as well as
calling cpu_interrupt() or cpu_reset_interrupt() they also update
env->irq_line_state.
For IRQ and FIQ it doesn't matter whether we set and clear the bits
in irq_line_state, because nothing looks at them. But for VIRQ and
VFIQ it will matter, because VIRQ and VFIQ are the logical OR of the
line state and some bits in HCR_EL2. We're going to need to call
arm_cpu_set_irq() for VIRQ and VFIQ; for consistency, handle IRQ and
FIQ that way too.
Since arm_cpu_set_irq() is now a function called from other parts of
the CPU code, we make its first argument a properly typed one, with a
wrapper taking void* for when we need to use it as a
qemu_irq_handler.
Signed-off-by: Peter Maydell <[email protected]>
---
target/arm/cpu.c | 14 +++++++++++---
target/arm/internals.h | 14 ++++++++++++++
target/arm/tcg/gicv5-cpuif.c | 35 ++++-------------------------------
3 files changed, 29 insertions(+), 34 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
