This series makes hexagon compatible with the other ones we already integrated.
The biggest change is to introduce a semihosting interface, since existing arm symbols conflict with hexagon ones. This is also need for when we'll integrate riscv soon. Pierrick Bouvier (11): target/hexagon: prefix helpers conflicting with other arch target-info: add target_hexagon hw/hexagon/virt: make machine available for hexagon target only hw/core/cpu: restrict tcg_ops to CONFIG_TCG only semihosting: declare semihosting cpu ops target/riscv: declare semihosting ops target/hexagon: declare semihosting ops target/arm: declare semihosting ops semihosting: use new semihosting ops semihosting: remove common_* functions meson.build: add hexagon-softmmu to multi-target hw/hexagon/virt.c | 2 ++ include/hw/core/cpu.h | 8 +++++ include/qemu/target-info.h | 7 ++++ include/semihosting/common-semi.h | 24 +++++++++---- meson.build | 1 + semihosting/arm-compat-semi.c | 56 ++++++++++++++--------------- target-info.c | 5 +++ target/arm/common-semi-target.c | 29 ++++++++++----- target/arm/cpu.c | 4 +++ target/arm/internals.h | 2 ++ target/hexagon/common-semi-target.c | 26 +++++++++----- target/hexagon/cpu.c | 2 ++ target/hexagon/gen_tcg_sys.h | 2 +- target/hexagon/helper.h | 4 +-- target/hexagon/hex_mmu.c | 2 +- target/hexagon/hex_mmu.h | 2 +- target/hexagon/internal.h | 2 ++ target/hexagon/op_helper.c | 4 +-- target/hexagon/translate.c | 4 +-- target/riscv/common-semi-target.c | 29 ++++++++++----- target/riscv/cpu.c | 4 +++ target/riscv/internals.h | 2 ++ 22 files changed, 151 insertions(+), 70 deletions(-) -- 2.43.0
